Searched refs:GP3_VEC_HDR_PAT_CLR0_ENABLE (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-geode/dist/src/cim/
H A Dcim_gp.c527 gp3_cmd_header |= GP3_VEC_HDR_PAT_CLR0_ENABLE;
574 (GP3_VEC_HDR_PAT_CLR0_ENABLE | GP3_VEC_HDR_PAT_CLR1_ENABLE |
3113 gp3_cmd_header |= GP3_VEC_HDR_PAT_CLR0_ENABLE;
3302 gp3_cmd_header |= GP3_VEC_HDR_PAT_CLR0_ENABLE;
H A Dcim_regs.h177 #define GP3_VEC_HDR_PAT_CLR0_ENABLE 0x00000040 macro

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