| /xsrc/external/mit/libX11/dist/src/xcms/ |
| XRGB.c | 47 static unsigned short const MASK[17] = {
136 pColors->spec.RGB.red = (pXColors->red & MASK[bits_per_rgb]);
137 pColors->spec.RGB.green = (pXColors->green & MASK[bits_per_rgb]);
138 pColors->spec.RGB.blue = (pXColors->blue & MASK[bits_per_rgb]);
216 pColor->spec.RGB.red &= MASK[bits_per_rgb];
217 pColor->spec.RGB.green &= MASK[bits_per_rgb];
218 pColor->spec.RGB.blue &= MASK[bits_per_rgb];
243 pXColor->red &= MASK[bits_per_rgb];
244 pXColor->green &= MASK[bits_per_rgb];
245 pXColor->blue &= MASK[bits_per_rgb]
[all...] |
| /xsrc/external/mit/pixman/dist/pixman/ |
| pixman-arm-simd-asm.S | 53 * unaligned_mask Whether to use non-wordaligned loads of mask image
68 WK6 .req MASK
121 mov MASK, SRC
129 mov MASK, SRC
138 mov MASK, SRC
145 WK6 .req MASK
218 /* Hold loop invariants in MASK and STRIDE_M */
219 ldr MASK, =0x07E007E0
227 and SCRATCH, WK\()\reg1, MASK @ 00000GGGGGG0000000000gggggg00000
228 bic WK\()\reg2, WK\()\reg1, MASK @ RRRRR000000BBBBBrrrrr000000bbbb
[all...] |
| pixman-combine32.h | 2 #define MASK 0xff
18 #define RED_8(x) (((x) >> R_SHIFT) & MASK)
19 #define GREEN_8(x) (((x) >> G_SHIFT) & MASK)
20 #define BLUE_8(x) ((x) & MASK)
71 (((uint16_t) (a) * MASK + ((b) / 2)) / (b))
118 t = (x & MASK) * (a & MASK); \
119 t |= (x & R_MASK) * ((a >> R_SHIFT) & MASK); \
|
| pixman-arm-neon-asm.h | 29 * Any combinations of source, destination and mask images with 8bpp,
59 * Offset in stack where mask and source pointer/stride can be accessed
60 * from 'init' macro. This is useful for doing special handling for solid mask.
445 pld [MASK, #(PREFETCH_DISTANCE_SIMPLE * mask_bpp / 8)]
452 (mask_basereg - pixblock_size * mask_bpp / 64), MASK
474 pixld (\lowbit * 8 / dst_w_bpp), mask_bpp, mask_basereg, MASK
536 pixld \chunk_size, mask_bpp, mask_basereg, MASK
590 add MASK, MASK, MASK_STRIDE, lsl #mask_bpp_shift
599 sub MASK, MASK, W, lsl #mask_bpp_shif
[all...] |
| pixman-arm-simd-asm.h | 91 * Offset into stack where mask and source pointer/stride can be accessed.
285 * "bpp" - number of bits per pixel in the channel (source, mask or
289 * "base" - base address register of channel to preload (SRC, MASK or DST)
445 preload_middle mask_bpp, MASK, 1
448 preload_middle mask_bpp, MASK, 0
484 preload_trailing mask_bpp, mask_bpp_shift, MASK
519 tst MASK, #3
566 add MASK, MASK, STRIDE_M
643 .error "requested mask bpp (mask_bpp) is not supported
[all...] |
| pixman-arma64-neon-asm.h | 29 * Any combinations of source, destination and mask images with 8bpp,
506 prfm PREFETCH_MODE, [MASK, #(PREFETCH_DISTANCE_SIMPLE * mask_bpp / 8)]
513 (mask_basereg - pixblock_size * mask_bpp / 64), MASK
537 pixld (\lowbit * 8 / dst_w_bpp), mask_bpp, mask_basereg, MASK
605 pixld \chunk_size, mask_bpp, mask_basereg, MASK
656 add MASK, MASK, MASK_STRIDE, lsl #mask_bpp_shift
665 sub MASK, MASK, W, lsl #mask_bpp_shift
676 * v24, v25, v26, v27 - reserved for loading mask pixel dat
[all...] |
| pixman-arm-neon-asm-bilinear.S | 33 * 2. load mask pixels
35 * 4. duplicate mask to fill whole register
37 * 6. apply mask to source pixels
45 * Assume that symbol(register .req) OUT and MASK are defined at caller of these macro blocks.
220 * Macros for loading mask pixels into register 'mask'.
223 .macro bilinear_load_mask_x numpix, mask
226 .macro bilinear_load_mask_8 numpix, mask
228 vld1.32 {\mask[0]}, [MASK]!
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/valhall/ |
| disasm.py | 114 unsigned primary_opc = (instr >> 48) & MASK(9);
115 unsigned imm_mode = (instr >> 57) & MASK(2);
157 sr_count = "((instr >> 33) & MASK(3))" if sr.count == 0 else sr.count
204 ((instr >> ${imm.start}) & MASK(${imm.size})) ${f", {imm.size})" if imm.signed else ""});
|
| disassemble.h | 13 #define MASK(count) ((1ull << (count)) - 1)
23 unsigned mask = (dest >> 6); local
28 // assert(mask != 0);
29 // assert(mask == 0x3 || can_mask);
31 if (mask != 0x3)
32 fprintf(fp, ".h%u", (mask == 1) ? 0 : 1);
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_lower_spill.c | 51 spill->srcs[1]->wrmask = MASK(orig_components);
63 clone->srcs[1]->wrmask = MASK(components);
86 reload->dsts[0]->wrmask = MASK(orig_components);
98 clone->dsts[0]->wrmask = MASK(components);
|
| ir3_a6xx.c | 52 ldib->dsts[0]->wrmask = MASK(intr->num_components);
211 ldib->dsts[0]->wrmask = MASK(intr->num_components);
360 resinfo->dsts[0]->wrmask = MASK(3);
385 load->dsts[0]->wrmask = MASK(dest_components);
|
| ir3_a4xx.c | 55 ldgb->dsts[0]->wrmask = MASK(intr->num_components);
205 debug_assert(const_state->image_dims.mask & (1 << index));
246 ldib->dsts[0]->wrmask = MASK(intr->num_components);
|
| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| vb_i2c.h | 81 //#define MASK(n) BITSMASK(1?n, 0?n)
83 #define MASK(n) ( BITS(LARGE(n)-SMALL(n)+1) << SMALL(n) )
87 #define GETBITS(b,n) ( ((b) & MASK(n)) >> SMALL(n) ) /* Jong@08032009 */
90 #define SETBITS(b, n) ( ( (b) << ((1?n) > (0?n) ? (0?n) : (1?n)) ) & MASK(n) )
|
| vb_i2c.c | 1197 pHWDE->ucI2cDVI = (pHWDE->ucI2cDVI & MASK(1:1)) | SETBITS(data, 0:0);
1209 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cDVI;
1248 pHWDE->ucI2cDVI = (pHWDE->ucI2cDVI & MASK(0:0)) | SETBITS(data, 1:1);
1261 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cDVI;
1408 pHWDE->ucI2cCRT = (pHWDE->ucI2cCRT & MASK(1:1)) | SETBITS(data, 0:0);
1411 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cCRT;
1443 pHWDE->ucI2cCRT = (pHWDE->ucI2cCRT & MASK(0:0)) | SETBITS(data, 1:1);
1445 temp = (temp & (~MASK(1:0))) | pHWDE->ucI2cCRT;
1525 pHWDE->ucI2cFCNT = (pHWDE->ucI2cFCNT & MASK(3:3)) | SETBITS(data, 2:2);
1528 temp = (temp & (~MASK(3:2))) | pHWDE->ucI2cFCNT
[all...] |
| vb_struct.h | 206 USHORT MASK;
213 USHORT MASK;
272 USHORT MASK;
279 USHORT MASK;
|
| /xsrc/external/mit/xf86-video-i128/dist/src/ |
| i128accel.c | 201 pI128->mem.rbase_a[MASK] = -1;
204 pI128->mem.rbase_a[MASK] = planemask |
210 pI128->mem.rbase_a[MASK] = planemask | (planemask<<16);
215 pI128->mem.rbase_a[MASK] = planemask;
262 pI128->mem.rbase_a[MASK] = -1;
265 pI128->mem.rbase_a[MASK] = planemask |
271 pI128->mem.rbase_a[MASK] = planemask | (planemask<<16);
276 pI128->mem.rbase_a[MASK] = planemask;
373 pI128->mem.rbase_a[MASK] = planemask;
|
| /xsrc/external/mit/MesaLib/dist/src/asahi/compiler/ |
| agx_opcodes.py | 46 (exact, mask, length_short, length_long) = description
53 self.mask = mask
87 MASK = immediate("mask")
198 srcs = 5, imms = [DIM, LOD_MODE, MASK, SCOREBOARD])
203 srcs = 2, imms = [FORMAT, MASK, SCOREBOARD])
231 mask = 0x7F | (0x3 << 9) | mod_mask | (0x3 << 44) variable
234 op(name, (exact, mask, 6, _), dests = 0, srcs = 2, can_eliminate = False,
|
| /xsrc/external/mit/xkill/dist/ |
| xkill.c | 269 #define MASK (ButtonPressMask | ButtonReleaseMask)
287 if (XGrabPointer (dpy, root, False, MASK, GrabModeSync, GrabModeAsync,
298 XWindowEvent (dpy, root, MASK, &event);
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/tests/ |
| delay.c | 130 instr->dsts[0]->wrmask = MASK(instr->repeat + 1);
136 reg->wrmask = MASK(instr->repeat + 1);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_image.c | 90 img->width = sz & MASK(15);
163 img->width = sz & MASK(15);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/core/core/ |
| backend_impl.h | 52 #define MASK 0xff
190 simdscalari mask[2];
196 uint32_t centerCoverage = ((uint32_t)(*coverageMask) & MASK);
228 mask[0] = _simd_set_epi32(0, 0, 0, 0, 0, 0, 0, -1);
232 mask[0] = _simd_set_epi32(0, 0, 0, 0, 0, 0, -1, -1);
236 mask[0] = _simd_set_epi32(0, 0, 0, 0, -1, -1, -1, -1);
240 mask[0] = _simd_set1_epi32(-1);
244 mask[0] = _simd_set1_epi32(-1);
245 mask[1] = _simd_set1_epi32(-1);
254 _mm256_castsi256_ps(mask[0])
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_image.c | 92 img->width = sz & MASK(15);
171 img->width = sz & MASK(15);
|
| /xsrc/external/mit/brotli/dist/c/enc/ |
| hash.h | 333 #define MASK ((NUMBUCKETS * 64) - 1)
342 #undef MASK
466 MemoryManager* m, Hasher* hasher, const uint8_t* data, size_t mask,
476 input_size, position, data, mask); \
|
| /xsrc/external/mit/xf86-video-intel/dist/test/ |
| render-glyphs.c | 64 GLYPHS, OP, DST, SRC, MASK, CLIP,
255 if (gi->stage == MASK) {
330 len = sprintf(buf, "glyphs=%s, op=%d, dst=%08x, src=%08x, mask=%s",
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a5xx/ |
| fd5_image.c | 93 img->width = sz & MASK(15);
|
