HomeSort by: relevance | last modified time | path
    Searched refs:MMioBase (Results 1 - 4 of 4) sorted by relevancy

  /xsrc/external/mit/xf86-video-tseng/dist/src/
tseng_accel.h 7 #define MMU_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x13<<0, x)
8 #define ACL_SUSPEND_TERMINATE(x) MMIO_OUT8(pTseng->MMioBase, 0x30<<0, x)
9 #define ACL_OPERATION_STATE(x) MMIO_OUT8(pTseng->MMioBase, 0x31<<0, x)
11 #define ACL_SYNC_ENABLE(x) MMIO_OUT8(pTseng->MMioBase, 0x32<<0, x)
15 MMIO_OUT8(pTseng->MMioBase, 0x35<<0, x)
16 #define ACL_INTERRUPT_MASK(x) MMIO_OUT8(pTseng->MMioBase, 0x34<<0, x)
19 MMIO_OUT8(pTseng->MMioBase, ACL_ACCELERATOR_STATUS, x)
23 #define ACL_POWER_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x37<<0, x)
26 #define ACL_NQ_X_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x38<<0, x)
27 #define ACL_NQ_Y_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x3A<<0, x
    [all...]
tseng.h 133 char * MMioBase;
tseng_accel.c 152 ErrorF("MMioBase = 0x%x, scratchMemBase = 0x%x\n", pTseng->MMioBase, pTseng->scratchMemBase);
211 MMIO_OUT32(pTseng->MMioBase, 0x00<<0, 0x200000L);
212 MMIO_OUT32(pTseng->MMioBase, 0x04<<0, 0x280000L);
214 MMIO_OUT32(pTseng->MMioBase, 0x00<<0, 0x0L);
215 MMIO_OUT32 (pTseng->MMioBase, 0x04<<0, 0x100000L);
321 /* *((LongP) (MMioBase + 0x08)) = (CARD32) pTseng->acl_ColorExpandDst;*/
tseng_driver.c 1650 pTseng->MMioBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
1655 pTseng->MMioBase = pTseng->FbBase;
1657 if (!pTseng->MMioBase) {
1662 pTseng->MMioBase += 0x3FFF00L;

Completed in 10 milliseconds