Searched refs:MW0_SZ (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-i128/dist/src/
H A Di128init.c85 iR->i128_base_w[MW0_SZ] = pI128->mem.rbase_w[MW0_SZ]; /* 0x0008 */
313 pI128->mem.rbase_w[MW0_SZ] = iR->i128_base_w[MW0_SZ]; /* 0x0008 */
469 pI128->mem.rbase_w[MW0_SZ] = 0x00000009;
472 pI128->mem.rbase_w[MW0_SZ] = 0x0000000B;
477 pI128->mem.rbase_w[MW0_SZ] = 0x0000000C;
486 pI128->mem.rbase_w[MW0_SZ] = 0x0000000D;
491 pI128->mem.rbase_w[MW0_SZ] = 0x0000000A;/* default 4MB */
H A Di128reg.h180 #define MW0_SZ 0x0008/4 /* 2MB = 0x9, 4MB = 0xA, 8MB = 0xB */ macro

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