Searched refs:PLL_MEMCLK__66667KHZ (Results 1 - 2 of 2) sorted by relevance
| /xsrc/external/mit/xf86-video-i740/dist/src/ | ||
| H A D | i740_reg.h | 197 #define PLL_MEMCLK__66667KHZ 0x00 macro |
| H A D | i740_driver.c | 1310 i740Reg->PLLControl = PLL_MEMCLK__66667KHZ; /* 66 MHz */ |
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