Searched refs:R200_PP_TXABLEND2_0 (Results 1 - 13 of 13) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_blit.c | 180 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
204 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
238 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
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| H A D | r200_sanity.c | 461 { R200_PP_TXABLEND2_0, "R200_PP_TXABLEND2_0" },
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| H A D | r200_reg.h | 1378 #define R200_PP_TXABLEND2_0 0x2f0c macro
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_blit.c | 167 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
194 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
228 OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 |
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| H A D | r200_sanity.c | 461 { R200_PP_TXABLEND2_0, "R200_PP_TXABLEND2_0" },
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| H A D | r200_reg.h | 1378 #define R200_PP_TXABLEND2_0 0x2f0c macro
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_render.c | 883 OUT_ACCEL_REG(R200_PP_TXABLEND2_0, R200_TXA_OUTPUT_REG_R0);
932 OUT_ACCEL_REG(R200_PP_TXABLEND2_0, R200_TXA_OUTPUT_REG_R0);
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| H A D | radeon_textured_videofuncs.c | 814 OUT_ACCEL_REG(R200_PP_TXABLEND2_0,
916 OUT_ACCEL_REG(R200_PP_TXABLEND2_0,
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| H A D | radeon_exa_render.c | 1119 OUT_ACCEL_REG(R200_PP_TXABLEND2_0,
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| H A D | radeon_reg.h | 3019 #define R200_PP_TXABLEND2_0 0x2f0c macro
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| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| H A D | radeon_textured_videofuncs.c | 641 OUT_RING_REG(R200_PP_TXABLEND2_0,
743 OUT_RING_REG(R200_PP_TXABLEND2_0,
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| H A D | radeon_exa_render.c | 1059 OUT_RING_REG(R200_PP_TXABLEND2_0,
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| H A D | radeon_reg.h | 3019 #define R200_PP_TXABLEND2_0 0x2f0c macro
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