Searched refs:R200_PP_TXABLEND_0 (Results 1 - 13 of 13) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_blit.c | 176 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
200 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
234 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
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| H A D | r200_sanity.c | 460 { R200_PP_TXABLEND_0, "R200_PP_TXABLEND_0" },
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| H A D | r200_reg.h | 1282 #define R200_PP_TXABLEND_0 0x2f08 macro
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_blit.c | 163 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
190 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
224 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
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| H A D | r200_sanity.c | 460 { R200_PP_TXABLEND_0, "R200_PP_TXABLEND_0" },
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| H A D | r200_reg.h | 1282 #define R200_PP_TXABLEND_0 0x2f08 macro
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_render.c | 881 OUT_ACCEL_REG(R200_PP_TXABLEND_0, R200_TXA_ARG_A_TFACTOR_ALPHA |
931 OUT_ACCEL_REG(R200_PP_TXABLEND_0, R200_TXA_ARG_C_R0_ALPHA);
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| H A D | radeon_textured_videofuncs.c | 809 OUT_ACCEL_REG(R200_PP_TXABLEND_0,
911 OUT_ACCEL_REG(R200_PP_TXABLEND_0,
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| H A D | radeon_exa_render.c | 1118 OUT_ACCEL_REG(R200_PP_TXABLEND_0, ablend);
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| H A D | radeon_reg.h | 2923 #define R200_PP_TXABLEND_0 0x2f08 macro
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| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| H A D | radeon_textured_videofuncs.c | 636 OUT_RING_REG(R200_PP_TXABLEND_0,
738 OUT_RING_REG(R200_PP_TXABLEND_0,
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| H A D | radeon_exa_render.c | 1058 OUT_RING_REG(R200_PP_TXABLEND_0, ablend);
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| H A D | radeon_reg.h | 2923 #define R200_PP_TXABLEND_0 0x2f08 macro
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