Searched refs:R300_SCLK_CNTL2 (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_pm.c232 tmp = INPLL(pScrn, R300_SCLK_CNTL2);
239 OUTPLL(pScrn, R300_SCLK_CNTL2, tmp);
319 tmp = INPLL(pScrn, R300_SCLK_CNTL2);
323 OUTPLL(pScrn, R300_SCLK_CNTL2, tmp);
463 tmp = INPLL(pScrn, R300_SCLK_CNTL2);
467 OUTPLL(pScrn, R300_SCLK_CNTL2, tmp);
546 tmp = INPLL(pScrn, R300_SCLK_CNTL2);
550 OUTPLL(pScrn, R300_SCLK_CNTL2, tmp);
H A Dradeon_reg.h1562 #define R300_SCLK_CNTL2 0x1e /* PLL */ macro
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_reg.h1562 #define R300_SCLK_CNTL2 0x1e /* PLL */ macro

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