Searched refs:RADEON_CP_VC_CNTL_NUM_SHIFT (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_ioctl.c144 (vertex_nr << RADEON_CP_VC_CNTL_NUM_SHIFT));
162 (vertex_nr << RADEON_CP_VC_CNTL_NUM_SHIFT));
189 cmd[5] |= nr << RADEON_CP_VC_CNTL_NUM_SHIFT;
192 cmd[3] |= nr << RADEON_CP_VC_CNTL_NUM_SHIFT;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_ioctl.c143 (vertex_nr << RADEON_CP_VC_CNTL_NUM_SHIFT));
161 (vertex_nr << RADEON_CP_VC_CNTL_NUM_SHIFT));
188 cmd[5] |= nr << RADEON_CP_VC_CNTL_NUM_SHIFT;
191 cmd[3] |= nr << RADEON_CP_VC_CNTL_NUM_SHIFT;
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_exa_render.c2190 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2197 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2204 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2401 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2424 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2447 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
H A Dradeon_render.c658 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
996 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
H A Dradeon_textured_videofuncs.c437 ((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
1070 ((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
2558 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2565 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
4176 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
H A Dradeon_reg.h3259 #define RADEON_CP_VC_CNTL_NUM_SHIFT 16 macro
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_exa_render.c2111 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2118 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2125 (info->accel_state->num_vtx << RADEON_CP_VC_CNTL_NUM_SHIFT));
2282 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2300 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2318 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
H A Dradeon_textured_videofuncs.c354 ((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
892 ((loop_boxes * 3) << RADEON_CP_VC_CNTL_NUM_SHIFT));
2280 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
2287 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
3822 (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
H A Dradeon_reg.h3259 #define RADEON_CP_VC_CNTL_NUM_SHIFT 16 macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h2110 #define RADEON_CP_VC_CNTL_NUM_SHIFT 16 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h2110 #define RADEON_CP_VC_CNTL_NUM_SHIFT 16 macro

Completed in 77 milliseconds