Searched refs:RADEON_P2PLL_DIV_0 (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dlegacy_crtc.c453 OUTPLLP(pScrn, RADEON_P2PLL_DIV_0,
457 OUTPLLP(pScrn, RADEON_P2PLL_DIV_0,
624 save->p2pll_div_0 = INPLL(pScrn, RADEON_P2PLL_DIV_0);
H A Dradeon_reg.h1407 #define RADEON_P2PLL_DIV_0 0x002c macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h941 #define RADEON_P2PLL_DIV_0 0x002c macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h941 #define RADEON_P2PLL_DIV_0 0x002c macro
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_reg.h1407 #define RADEON_P2PLL_DIV_0 0x002c macro

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