Searched refs:RADEON_PCIE_LC_LINK_WIDTH_CNTL (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_pm.c671 link_width_cntl = INPCIE_P(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL);
695 OUTPCIE_P(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
696 OUTPCIE_P(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl | RADEON_PCIE_LC_RECONFIG_NOW);
709 link_width_cntl = INPCIE(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL);
720 OUTPCIE(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
721 OUTPCIE(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl | RADEON_PCIE_LC_RECONFIG_NOW);
724 link_width_cntl = INPCIE(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL);
726 link_width_cntl = INPCIE(pScrn, RADEON_PCIE_LC_LINK_WIDTH_CNTL);
H A Dradeon_reg.h260 #define RADEON_PCIE_LC_LINK_WIDTH_CNTL 0xa2 /* PCIE */ macro
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_reg.h260 #define RADEON_PCIE_LC_LINK_WIDTH_CNTL 0xa2 /* PCIE */ macro

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