Searched refs:SET_FIELD (Results 1 - 14 of 14) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| H A D | gen7_l3_state.c | 123 SET_FIELD(cfg->n[GEN_L3P_URB], GEN8_L3CNTLREG_URB_ALLOC) | 124 SET_FIELD(cfg->n[GEN_L3P_RO], GEN8_L3CNTLREG_RO_ALLOC) | 125 SET_FIELD(cfg->n[GEN_L3P_DC], GEN8_L3CNTLREG_DC_ALLOC) | 126 SET_FIELD(cfg->n[GEN_L3P_ALL], GEN8_L3CNTLREG_ALL_ALLOC)); 161 SET_FIELD(cfg->n[GEN_L3P_URB] - n0_urb, GEN7_L3CNTLREG2_URB_ALLOC) | 163 SET_FIELD(cfg->n[GEN_L3P_ALL], GEN7_L3CNTLREG2_ALL_ALLOC) | 164 SET_FIELD(cfg->n[GEN_L3P_RO], GEN7_L3CNTLREG2_RO_ALLOC) | 165 SET_FIELD(cfg->n[GEN_L3P_DC], GEN7_L3CNTLREG2_DC_ALLOC)); 167 OUT_BATCH(SET_FIELD(cfg->n[GEN_L3P_IS], GEN7_L3CNTLREG3_IS_ALLOC) | 168 SET_FIELD(cf [all...] |
| H A D | intel_blit.c | 351 OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X)); 352 OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X)); 358 OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X)); 690 OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X)); 691 OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD( [all...] |
| H A D | brw_defines.h | 39 #define SET_FIELD(value, field) \ macro
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| H A D | gfx7_l3_state.c | 124 SET_FIELD(cfg->n[INTEL_L3P_URB], GFX8_L3CNTLREG_URB_ALLOC) | 125 SET_FIELD(cfg->n[INTEL_L3P_RO], GFX8_L3CNTLREG_RO_ALLOC) | 126 SET_FIELD(cfg->n[INTEL_L3P_DC], GFX8_L3CNTLREG_DC_ALLOC) | 127 SET_FIELD(cfg->n[INTEL_L3P_ALL], GFX8_L3CNTLREG_ALL_ALLOC)); 162 SET_FIELD(cfg->n[INTEL_L3P_URB] - n0_urb, GFX7_L3CNTLREG2_URB_ALLOC) | 164 SET_FIELD(cfg->n[INTEL_L3P_ALL], GFX7_L3CNTLREG2_ALL_ALLOC) | 165 SET_FIELD(cfg->n[INTEL_L3P_RO], GFX7_L3CNTLREG2_RO_ALLOC) | 166 SET_FIELD(cfg->n[INTEL_L3P_DC], GFX7_L3CNTLREG2_DC_ALLOC)); 168 OUT_BATCH(SET_FIELD(cfg->n[INTEL_L3P_IS], GFX7_L3CNTLREG3_IS_ALLOC) | 169 SET_FIELD(cf [all...] |
| H A D | brw_blit.c | 359 OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X)); 360 OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X)); 366 OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X)); 698 OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X)); 699 OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD( [all...] |
| H A D | brw_defines.h | 39 #define SET_FIELD(value, field) \ macro
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_nir_lower_alpha_to_coverage.c | 115 SET_FIELD(store_offset, BRW_NIR_FRAG_OUTPUT_LOCATION);
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| H A D | brw_nir.c | 508 SET_FIELD(var->data.index, BRW_NIR_FRAG_OUTPUT_INDEX) | 509 SET_FIELD(var->data.location, BRW_NIR_FRAG_OUTPUT_LOCATION);
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| H A D | brw_eu_defines.h | 45 #define SET_FIELD(value, field) \ macro
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| H A D | brw_fs_nir.cpp | 3486 SET_FIELD(store_offset, BRW_NIR_FRAG_OUTPUT_LOCATION);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_eu_defines.h | 42 #define SET_FIELD(value, field) \ macro
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| H A D | brw_nir.c | 502 SET_FIELD(var->data.index, BRW_NIR_FRAG_OUTPUT_INDEX) | 503 SET_FIELD(var->data.location, BRW_NIR_FRAG_OUTPUT_LOCATION);
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| H A D | brw_fs_nir.cpp | 3367 SET_FIELD(store_offset, BRW_NIR_FRAG_OUTPUT_LOCATION);
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 19.0.0.rst | 1395 - intel/defines: Explicitly cast to uint32_t in SET_FIELD and SET_BITS
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