Searched refs:SI_SGPR_VS_STATE_BITS (Results 1 - 8 of 8) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_shader.h167 SI_SGPR_VS_STATE_BITS = SI_NUM_RESOURCE_SGPRS, enumerator in enum:__anon05df395d0103
H A Dsi_state_draw.c249 /* Set SI_SGPR_VS_STATE_BITS. */
587 SI_SGPR_VS_STATE_BITS * 4,
596 SI_SGPR_VS_STATE_BITS * 4,
H A Dsi_shader.c3378 8 + SI_SGPR_VS_STATE_BITS);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_shader.h178 SI_SGPR_VS_STATE_BITS = SI_NUM_RESOURCE_SGPRS, enumerator in enum:__anon396a29300103
793 /* SI_SGPR_VS_STATE_BITS */
H A Dsi_state_draw.cpp701 /* Set SI_SGPR_VS_STATE_BITS. */
1129 radeon_set_sh_reg(vs_base + SI_SGPR_VS_STATE_BITS * 4,
1138 radeon_set_sh_reg(R_00B130_SPI_SHADER_USER_DATA_VS_0 + SI_SGPR_VS_STATE_BITS * 4,
1144 radeon_set_sh_reg(R_00B230_SPI_SHADER_USER_DATA_GS_0 + SI_SGPR_VS_STATE_BITS * 4,
H A Dsi_shader_llvm_gs.c122 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);
H A Dsi_shader_llvm_tess.c925 ret = si_insert_input_ret(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);
H A Dgfx10_shader_ngg.c1216 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS);

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