Searched refs:SSE3 (Results 1 - 8 of 8) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_cpu.c51 features |= SSE3;
104 if (features & SSE3)
H A Dsna.h277 #define SSE3 0x8 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_cpu.c51 features |= SSE3;
104 if (features & SSE3)
H A Dsna.h261 #define SSE3 0x8 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/common/
H A Disa.hpp55 bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; } function in class:InstructionSet
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/rasterizer/common/
H A Disa.hpp55 bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; } function in class:InstructionSet
/xsrc/external/mit/MesaLib/dist/docs/drivers/
H A Dllvmpipe.rst18 SSE2 is strongly encouraged. Support for SSE3 and SSE4.1 will yield
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D7.10.rst1836 - llvmpipe: Fix MSVC build. Enable the new SSE2 code on non SSE3

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