1/*
2 * Copyright (c) 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Chris Wilson <chris@chris-wilson.co.uk>
25 *
26 */
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include "sna.h"
33#include "sna_cpuid.h"
34
35#define xgetbv(index,eax,edx)                                   \
36	__asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index))
37
38#define has_YMM 0x1
39
40unsigned sna_cpu_detect(void)
41{
42	unsigned max = __get_cpuid_max(BASIC_CPUID, NULL);
43	unsigned eax, ebx, ecx, edx;
44	unsigned features = 0;
45	unsigned extra = 0;
46
47	if (max >= 1) {
48		__cpuid(1, eax, ebx, ecx, edx);
49
50		if (ecx & bit_SSE3)
51			features |= SSE3;
52
53		if (ecx & bit_SSSE3)
54			features |= SSSE3;
55
56		if (ecx & bit_SSE4_1)
57			features |= SSE4_1;
58
59		if (ecx & bit_SSE4_2)
60			features |= SSE4_2;
61
62		if (ecx & bit_OSXSAVE) {
63			unsigned int bv_eax, bv_ecx;
64			xgetbv(0, bv_eax, bv_ecx);
65			if ((bv_eax & 6) == 6)
66				extra |= has_YMM;
67		}
68
69		if ((extra & has_YMM) && (ecx & bit_AVX))
70			features |= AVX;
71
72		if (edx & bit_MMX)
73			features |= MMX;
74
75		if (edx & bit_SSE)
76			features |= SSE;
77
78		if (edx & bit_SSE2)
79			features |= SSE2;
80	}
81
82	if (max >= 7) {
83		__cpuid_count(7, 0, eax, ebx, ecx, edx);
84
85		if ((extra & has_YMM) && (ebx & bit_AVX2))
86			features |= AVX2;
87	}
88
89	return features;
90}
91
92char *sna_cpu_features_to_string(unsigned features, char *line)
93{
94	char *ret = line;
95
96#ifdef __x86_64__
97	line += sprintf (line, "x86-64");
98#else
99	line += sprintf (line, "x86");
100#endif
101
102	if (features & SSE2)
103		line += sprintf (line, ", sse2");
104	if (features & SSE3)
105		line += sprintf (line, ", sse3");
106	if (features & SSSE3)
107		line += sprintf (line, ", ssse3");
108	if (features & SSE4_1)
109		line += sprintf (line, ", sse4.1");
110	if (features & SSE4_2)
111		line += sprintf (line, ", sse4.2");
112	if (features & AVX)
113		line += sprintf (line, ", avx");
114	if (features & AVX2)
115		line += sprintf (line, ", avx2");
116
117	return ret;
118}
119