Searched refs:TCL_OUTPUT_VTXFMT (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_maos_arrays.c248 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
282 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
284 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
H A Dradeon_maos_verts.c317 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
368 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
370 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
H A Dradeon_context.h169 #define TCL_OUTPUT_VTXFMT 1 macro
H A Dradeon_state.c573 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC;
574 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE;
586 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
587 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
595 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
598 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
599 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
602 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
606 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
H A Dradeon_texstate.c685 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_ST_BIT(unit) |
858 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_Q_BIT(unit);
1016 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_ST_BIT(unit);
H A Dradeon_state_init.c835 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] =
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_maos_arrays.c247 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
281 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
283 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
H A Dradeon_maos_verts.c316 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
367 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
369 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
H A Dradeon_context.h169 #define TCL_OUTPUT_VTXFMT 1 macro
H A Dradeon_state.c572 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC;
573 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE;
585 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
586 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
594 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
597 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
598 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
601 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
605 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
H A Dradeon_texstate.c678 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_ST_BIT(unit) |
851 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_Q_BIT(unit);
1009 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_ST_BIT(unit);
H A Dradeon_state_init.c835 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] =

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