Searched refs:TV_CTL (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_tv.c787 OUTREG(TV_CTL, INREG(TV_CTL) | TV_ENC_ENABLE);
792 OUTREG(TV_CTL, INREG(TV_CTL) & ~TV_ENC_ENABLE);
845 dev_priv->save_TV_CTL = INREG(TV_CTL);
927 OUTREG(TV_CTL, dev_priv->save_TV_CTL);
1140 tv_ctl = INREG(TV_CTL);
1335 OUTREG(TV_CTL, tv_ctl);
1383 tv_ctl = INREG(TV_CTL);
1400 OUTREG(TV_CTL, tv_ct
[all...]
H A Di810_reg.h1571 /** @defgroup TV_CTL
1574 #define TV_CTL 0x68000 macro
1662 * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set
H A Di830_debug.c742 DEFINEREG(TV_CTL),
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h1571 /** @defgroup TV_CTL
1574 #define TV_CTL 0x68000 macro
1662 * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h1571 /** @defgroup TV_CTL
1574 #define TV_CTL 0x68000 macro
1662 * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set

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