Searched refs:VCLK_DIVISOR_VGA0 (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_debug.c636 DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
737 DEFINEREG(VCLK_DIVISOR_VGA0),
H A Di830_driver.c1834 pI830->saveVCLK_DIVISOR_VGA0 = INREG(VCLK_DIVISOR_VGA0);
1945 OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
H A Di810_reg.h321 #define VCLK_DIVISOR_VGA0 0x6000 macro
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h321 #define VCLK_DIVISOR_VGA0 0x6000 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h321 #define VCLK_DIVISOR_VGA0 0x6000 macro

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