Searched refs:VR01 (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/ivch/
H A Divch_reg.h45 /** @defgroup VR01 VCH Functionality Enable
48 #define VR01 0x01 macro
H A Divch.c235 if (!ivch_read(priv, VR01, &vr01))
249 ivch_write(priv, VR01, vr01);
295 ivch_write(priv, VR01, vr01);
309 ivch_read(priv, VR01, &val);
310 xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_INFO, "VR01: 0x%04x\n", val);
350 ivch_read(priv, VR01, &priv->save_VR01);
359 ivch_write(priv, VR01, priv->save_VR01);

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