| /xsrc/external/mit/MesaLib/dist/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_winsys.c | 159 struct amdgpu_winsys *ws = sws->aws;
292 struct amdgpu_winsys *aws = sws->aws; local
295 simple_mtx_lock(&aws->sws_list_lock);
300 struct amdgpu_winsys *aws = sws->aws; local
305 for (sws_iter = &aws->sws_list; *sws_iter; sws_iter = &(*sws_iter)->next) {
313 simple_mtx_unlock(&aws->sws_list_lock);
361 struct amdgpu_winsys *aws; local
387 aws = util_hash_table_get(dev_tab, dev)
[all...] |
| amdgpu_winsys.h | 44 struct amdgpu_winsys *aws; member in struct:amdgpu_screen_winsys
138 return amdgpu_screen_winsys(base)->aws;
|
| /xsrc/external/mit/MesaLib/dist/src/microsoft/compiler/ |
| dxil_nir_lower_int_samplers.c | 324 dxil_wrap_sampler_state *aws; member in struct:__anon2752
336 float min_lod = MAX2(params->aws->min_lod, 0.0f);
382 nir_ssa_def *lod_bias = nir_imm_float(b, params->aws->lod_bias);
398 if (params->aws->max_lod <= params->max_bias)
399 lod = nir_fmin(b, lod, nir_imm_float(b, params->aws->max_lod));
405 return nir_imin(b, lod, nir_imm_int(b, params->aws->last_level));
441 .aws = active_wrap_state,
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_cs.c | 811 struct radv_amdgpu_winsys *aws = cs0->ws; local
841 u_rwlock_rdlock(&aws->global_bo_list.lock);
877 u_rwlock_rdunlock(&aws->global_bo_list.lock);
892 struct radv_amdgpu_winsys *aws; local
899 aws = cs0->ws;
904 u_rwlock_rdlock(&aws->global_bo_list.lock);
955 u_rwlock_rdunlock(&aws->global_bo_list.lock);
969 struct radv_amdgpu_winsys *aws = cs0->ws; local
1104 u_rwlock_rdlock(&aws->global_bo_list.lock);
1112 u_rwlock_rdunlock(&aws->global_bo_list.lock)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_cs.c | 735 struct amdgpu_winsys *aws = (struct amdgpu_winsys*)ws; local
774 if (!amdgpu_ib_new_buffer(aws, ib, cs->ring_type))
|
