1/*
2 * Copyright © 2009 Corbin Simpson
3 * Copyright © 2015 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
25 * of the Software.
26 */
27
28#ifndef AMDGPU_WINSYS_H
29#define AMDGPU_WINSYS_H
30
31#include "pipebuffer/pb_cache.h"
32#include "pipebuffer/pb_slab.h"
33#include "gallium/drivers/radeon/radeon_winsys.h"
34#include "util/simple_mtx.h"
35#include "util/u_queue.h"
36#include <amdgpu.h>
37
38struct amdgpu_cs;
39
40#define NUM_SLAB_ALLOCATORS 3
41
42struct amdgpu_screen_winsys {
43   struct radeon_winsys base;
44   struct amdgpu_winsys *aws;
45   int fd;
46   struct pipe_reference reference;
47   struct amdgpu_screen_winsys *next;
48
49   /* Maps a BO to its KMS handle valid for this DRM file descriptor
50    * Protected by amdgpu_winsys::sws_list_lock
51    */
52   struct hash_table *kms_handles;
53};
54
55struct amdgpu_winsys {
56   struct pipe_reference reference;
57
58   /* File descriptor which was passed to amdgpu_device_initialize */
59   int fd;
60
61   struct pb_cache bo_cache;
62
63   /* Each slab buffer can only contain suballocations of equal sizes, so we
64    * need to layer the allocators, so that we don't waste too much memory.
65    */
66   struct pb_slabs bo_slabs[NUM_SLAB_ALLOCATORS];
67   struct pb_slabs bo_slabs_encrypted[NUM_SLAB_ALLOCATORS];
68
69   amdgpu_device_handle dev;
70
71   simple_mtx_t bo_fence_lock;
72
73   int num_cs; /* The number of command streams created. */
74   unsigned num_total_rejected_cs;
75   uint32_t surf_index_color;
76   uint32_t surf_index_fmask;
77   uint32_t next_bo_unique_id;
78   uint64_t allocated_vram;
79   uint64_t allocated_gtt;
80   uint64_t mapped_vram;
81   uint64_t mapped_gtt;
82   uint64_t slab_wasted_vram;
83   uint64_t slab_wasted_gtt;
84   uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
85   uint64_t num_gfx_IBs;
86   uint64_t num_sdma_IBs;
87   uint64_t num_mapped_buffers;
88   uint64_t gfx_bo_list_counter;
89   uint64_t gfx_ib_size_counter;
90
91   struct radeon_info info;
92
93   /* multithreaded IB submission */
94   struct util_queue cs_queue;
95
96   struct amdgpu_gpu_info amdinfo;
97   struct ac_addrlib *addrlib;
98
99   bool check_vm;
100   bool noop_cs;
101   bool reserve_vmid;
102   bool zero_all_vram_allocs;
103#if DEBUG
104   bool debug_all_bos;
105
106   /* List of all allocated buffers */
107   simple_mtx_t global_bo_list_lock;
108   struct list_head global_bo_list;
109   unsigned num_buffers;
110#endif
111
112   /* Single-linked list of all structs amdgpu_screen_winsys referencing this
113    * struct amdgpu_winsys
114    */
115   simple_mtx_t sws_list_lock;
116   struct amdgpu_screen_winsys *sws_list;
117
118   /* For returning the same amdgpu_winsys_bo instance for exported
119    * and re-imported buffers. */
120   struct hash_table *bo_export_table;
121   simple_mtx_t bo_export_table_lock;
122
123   /* Since most winsys functions require struct radeon_winsys *, dummy_ws.base is used
124    * for invoking them because sws_list can be NULL.
125    */
126   struct amdgpu_screen_winsys dummy_ws;
127};
128
129static inline struct amdgpu_screen_winsys *
130amdgpu_screen_winsys(struct radeon_winsys *base)
131{
132   return (struct amdgpu_screen_winsys*)base;
133}
134
135static inline struct amdgpu_winsys *
136amdgpu_winsys(struct radeon_winsys *base)
137{
138   return amdgpu_screen_winsys(base)->aws;
139}
140
141void amdgpu_surface_init_functions(struct amdgpu_screen_winsys *ws);
142
143#endif
144