Searched refs:before_inst (Results 1 - 8 of 8) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_visitor.cpp769 * and before_inst can be NULL in which case the instruction will be appended
777 vec4_instruction *before_inst)
779 assert((before_inst == NULL && before_block == NULL) ||
780 (before_inst && before_block));
792 if (before_inst)
793 emit_before(before_block, before_inst, pull);
801 if (before_inst)
802 emit_before(before_block, before_inst, pull);
819 if (before_inst)
820 emit_before(before_block, before_inst, pul
773 emit_pull_constant_load_reg(dst_reg dst,src_reg surf_index,src_reg offset_reg,bblock_t * before_block,vec4_instruction * before_inst) argument
[all...]
H A Dbrw_vec4.h307 vec4_instruction *before_inst);
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dqpu_schedule.c914 const struct v3d_qpu_instr *before_inst = &before->inst->qpu; local in function:instruction_latency
918 if (before_inst->type != V3D_QPU_INSTR_TYPE_ALU ||
922 if (before_inst->alu.add.magic_write) {
924 magic_waddr_latency(before_inst->alu.add.waddr,
928 if (before_inst->alu.mul.magic_write) {
930 magic_waddr_latency(before_inst->alu.mul.waddr,
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dqpu_schedule.c1359 const struct v3d_qpu_instr *before_inst = &before->inst->qpu; local in function:instruction_latency
1363 if (before_inst->type != V3D_QPU_INSTR_TYPE_ALU ||
1367 if (before_inst->alu.add.magic_write) {
1370 before_inst->alu.add.waddr,
1374 if (before_inst->alu.mul.magic_write) {
1377 before_inst->alu.mul.waddr,
1381 if (v3d_qpu_instr_is_sfu(before_inst))
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_visitor.cpp728 * and before_inst can be NULL in which case the instruction will be appended
736 vec4_instruction *before_inst)
738 assert((before_inst == NULL && before_block == NULL) ||
739 (before_inst && before_block));
750 if (before_inst)
751 emit_before(before_block, before_inst, pull);
769 if (before_inst)
770 emit_before(before_block, before_inst, pull);
732 emit_pull_constant_load_reg(dst_reg dst,src_reg surf_index,src_reg offset_reg,bblock_t * before_block,vec4_instruction * before_inst) argument
H A Dbrw_vec4.h304 vec4_instruction *before_inst);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c759 uint64_t before_inst = before->inst->inst; local in function:instruction_latency
762 return MAX2(waddr_latency(QPU_GET_FIELD(before_inst, QPU_WADDR_ADD),
764 waddr_latency(QPU_GET_FIELD(before_inst, QPU_WADDR_MUL),
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c759 uint64_t before_inst = before->inst->inst; local in function:instruction_latency
762 return MAX2(waddr_latency(QPU_GET_FIELD(before_inst, QPU_WADDR_ADD),
764 waddr_latency(QPU_GET_FIELD(before_inst, QPU_WADDR_MUL),

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