| /xsrc/external/mit/MesaLib/dist/src/compiler/glsl/ |
| H A D | lower_packing_builtins.cpp | 321 factory.emit(assign(i2, bitfield_extract(i, constant(0), constant(16)),
323 factory.emit(assign(i2, bitfield_extract(i, constant(16), constant(16)),
354 /* u4.y = bitfield_extract(u, 8, 8); */
355 factory.emit(assign(u4, bitfield_extract(u, constant(8u), constant(8u)),
358 /* u4.z = bitfield_extract(u, 16, 8); */
359 factory.emit(assign(u4, bitfield_extract(u, constant(16u), constant(8u)),
402 factory.emit(assign(i4, bitfield_extract(i, constant(0), constant(8)),
404 factory.emit(assign(i4, bitfield_extract(i, constant(8), constant(8)),
406 factory.emit(assign(i4, bitfield_extract(i, constant(16), constant(8)),
408 factory.emit(assign(i4, bitfield_extract(
[all...] |
| H A D | ir_builder.h | 214 ir_expression *bitfield_extract(operand a, operand b, operand c);
|
| H A D | ir_builder.cpp | 606 bitfield_extract(operand a, operand b, operand c) function in namespace:ir_builder
|
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| H A D | lower_packing_builtins.cpp | 321 factory.emit(assign(i2, bitfield_extract(i, constant(0), constant(16)),
323 factory.emit(assign(i2, bitfield_extract(i, constant(16), constant(16)),
354 /* u4.y = bitfield_extract(u, 8, 8); */
355 factory.emit(assign(u4, bitfield_extract(u, constant(8u), constant(8u)),
358 /* u4.z = bitfield_extract(u, 16, 8); */
359 factory.emit(assign(u4, bitfield_extract(u, constant(16u), constant(8u)),
402 factory.emit(assign(i4, bitfield_extract(i, constant(0), constant(8)),
404 factory.emit(assign(i4, bitfield_extract(i, constant(8), constant(8)),
406 factory.emit(assign(i4, bitfield_extract(i, constant(16), constant(8)),
408 factory.emit(assign(i4, bitfield_extract(
[all...] |
| H A D | ir_builder.h | 214 ir_expression *bitfield_extract(operand a, operand b, operand c);
|
| H A D | ir_builder.cpp | 606 bitfield_extract(operand a, operand b, operand c) function in namespace:ir_builder
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3_nir_lower_tess.c | 51 bitfield_extract(nir_builder *b, nir_ssa_def *v, uint32_t start, uint32_t mask) function in typeref:typename:nir_ssa_def *
60 return bitfield_extract(b, state->header, 11, 31);
66 return bitfield_extract(b, state->header, 6, 31);
72 return bitfield_extract(b, state->header, state->local_primitive_id_start,
274 return bitfield_extract(b, nir_load_gs_header_ir3(b), 16, 1023);
|
| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 18.2.2.rst | 121 - radeonsi: add a workaround for bitfield_extract when count is 0
|
| H A D | 19.0.0.rst | 2278 - ac/nir: remove the bitfield_extract workaround for LLVM 8
|
| H A D | 21.0.0.rst | 1290 - d3d12: lower bitfield_extract to shifts
|
| H A D | 20.2.0.rst | 4227 - glsl_to_nir: fix bitfield_extract with 16-bit operands
|
| H A D | 21.1.0.rst | 2187 - r600/sfn: lower bitfield_extract and bitfield_insert in NIR
|