Searched refs:brw_null_reg (Results 1 - 25 of 44) sorted by relevance

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/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_sf.c23 brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0),
49 brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0),
H A Dbrw_eu_emit.c723 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
724 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
726 brw_set_dest(p, insn, __retype_d(brw_null_reg()));
727 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
907 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
908 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
910 brw_set_dest(p, insn, __retype_d(brw_null_reg()));
911 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
954 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
955 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_sf.c23 brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0),
49 brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0),
H A Dbrw_eu_emit.c723 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
724 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
726 brw_set_dest(p, insn, __retype_d(brw_null_reg()));
727 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
907 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
908 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
910 brw_set_dest(p, insn, __retype_d(brw_null_reg()));
911 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
954 brw_set_src0(p, insn, __retype_d(brw_null_reg()));
955 brw_set_src1(p, insn, __retype_d(brw_null_reg()));
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_clip_unfilled.c82 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW),
106 vec1(brw_null_reg()),
143 vec1(brw_null_reg()),
204 vec1(brw_null_reg()),
217 vec1(brw_null_reg()),
233 vec1(brw_null_reg()),
243 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
251 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
327 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
370 vec1(brw_null_reg()), BRW_CONDITIONAL_N
[all...]
H A Dbrw_clip_tri.c143 vec1(brw_null_reg()),
181 vec1(brw_null_reg()),
195 vec1(brw_null_reg()),
234 brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1));
249 brw_CMP(p, brw_null_reg(), cond, vec1(dst), brw_imm_f(0.0f));
290 brw_AND(p, vec1(brw_null_reg()), c->reg.planemask, brw_imm_ud(1));
332 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
374 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
428 vec1(brw_null_reg()),
507 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_N
[all...]
H A Dbrw_clip_line.c129 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
150 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
199 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, vec1(c->reg.dp1), brw_imm_f(0.0f));
208 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
220 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
234 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
243 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
274 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
H A Dbrw_clip_util.c167 brw_MUL(p, vec4(brw_null_reg()), deref_4f(v1_ptr, delta), t0);
216 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ,
276 vec4(brw_null_reg()),
342 allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
363 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
444 brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
H A Dbrw_vec4_dead_code_eliminate.cpp109 inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type));
119 inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type));
H A Dbrw_eu_emit.c1316 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1317 brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1319 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1320 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1325 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1516 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1517 brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1519 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1520 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1525 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_
[all...]
H A Dbrw_fs_dead_code_eliminate.cpp99 inst->dst = fs_reg(retype(brw_null_reg(), inst->dst.type));
H A Dbrw_vec4.h77 return dst_reg(brw_null_reg());
82 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF));
87 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
92 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
H A Dbrw_compile_sf.c166 brw_CMP(p, vec4(brw_null_reg()), backface_conditional, c->det, brw_imm_f(0));
492 brw_MUL(p, brw_null_reg(), c->a1_sub_a0, c->dy2);
498 brw_MUL(p, brw_null_reg(), c->a2_sub_a0, c->dx0);
513 brw_null_reg(),
587 brw_null_reg(),
677 brw_null_reg(),
738 brw_null_reg(),
760 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_clip_unfilled.c82 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW),
106 vec1(brw_null_reg()),
143 vec1(brw_null_reg()),
204 vec1(brw_null_reg()),
217 vec1(brw_null_reg()),
233 vec1(brw_null_reg()),
243 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
251 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
327 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
370 vec1(brw_null_reg()), BRW_CONDITIONAL_N
[all...]
H A Dbrw_clip_tri.c143 vec1(brw_null_reg()),
181 vec1(brw_null_reg()),
195 vec1(brw_null_reg()),
234 brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1));
249 brw_CMP(p, brw_null_reg(), cond, vec1(dst), brw_imm_f(0.0f));
290 brw_AND(p, vec1(brw_null_reg()), c->reg.planemask, brw_imm_ud(1));
332 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
374 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
428 vec1(brw_null_reg()),
507 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_N
[all...]
H A Dbrw_clip_line.c129 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
150 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
199 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, vec1(c->reg.dp1), brw_imm_f(0.0f));
208 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
220 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
234 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
243 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
274 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
H A Dbrw_clip_util.c167 brw_MUL(p, vec4(brw_null_reg()), deref_4f(v1_ptr, delta), t0);
216 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ,
276 vec4(brw_null_reg()),
342 allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
363 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
444 brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
H A Dbrw_vec4_dead_code_eliminate.cpp108 inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type));
118 inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type));
H A Dbrw_eu_emit.c1435 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1436 brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1438 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1439 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1444 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)));
1636 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1637 brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1639 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1640 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
1645 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_
[all...]
H A Dbrw_compile_ff_gs.c225 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
391 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE,
425 brw_CMP(p, vec8(brw_null_reg()), BRW_CONDITIONAL_EQ,
482 final_write ? c->reg.temp : brw_null_reg(), /* dest */
531 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
547 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
H A Dbrw_fs_dead_code_eliminate.cpp101 inst->dst = fs_reg(spread(retype(brw_null_reg(), inst->dst.type),
H A Dbrw_vec4.h80 return dst_reg(brw_null_reg());
85 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF));
90 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
95 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
H A Dbrw_compile_sf.c166 brw_CMP(p, vec4(brw_null_reg()), backface_conditional, c->det, brw_imm_f(0));
492 brw_MUL(p, brw_null_reg(), c->a1_sub_a0, c->dy2);
498 brw_MUL(p, brw_null_reg(), c->a2_sub_a0, c->dx0);
513 brw_null_reg(),
587 brw_null_reg(),
677 brw_null_reg(),
738 brw_null_reg(),
760 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Di965_gram.y934 brw_set_src1(p, brw_last_inst, brw_null_reg());
1121 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1123 brw_set_src1(p, brw_last_inst, retype(brw_null_reg(),
1126 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
1128 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1143 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
1145 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1166 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1168 brw_set_src1(p, brw_last_inst, retype(brw_null_reg(),
1171 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_ff_gs_emit.c197 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
362 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE,
396 brw_CMP(p, vec8(brw_null_reg()), BRW_CONDITIONAL_EQ,
453 final_write ? c->reg.temp : brw_null_reg(), /* dest */
502 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
518 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),

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