1/* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#include "brw_fs.h" 25#include "brw_fs_live_variables.h" 26#include "brw_cfg.h" 27 28/** @file brw_fs_dead_code_eliminate.cpp 29 * 30 * Dataflow-aware dead code elimination. 31 * 32 * Walks the instruction list from the bottom, removing instructions that 33 * have results that both aren't used in later blocks and haven't been read 34 * yet in the tail end of this block. 35 */ 36 37/** 38 * Is it safe to eliminate the instruction? 39 */ 40static bool 41can_eliminate(const fs_inst *inst, BITSET_WORD *flag_live) 42{ 43 return !inst->is_control_flow() && 44 !inst->has_side_effects() && 45 !(flag_live[0] & inst->flags_written()) && 46 !inst->writes_accumulator; 47} 48 49/** 50 * Is it safe to omit the write, making the destination ARF null? 51 */ 52static bool 53can_omit_write(const fs_inst *inst) 54{ 55 switch (inst->opcode) { 56 case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL: 57 case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT_LOGICAL: 58 case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL: 59 return true; 60 default: 61 /* We can eliminate the destination write for ordinary instructions, 62 * but not most SENDs. 63 */ 64 if (inst->opcode < 128 && inst->mlen == 0) 65 return true; 66 67 /* It might not be safe for other virtual opcodes. */ 68 return false; 69 } 70} 71 72bool 73fs_visitor::dead_code_eliminate() 74{ 75 bool progress = false; 76 77 calculate_live_intervals(); 78 79 int num_vars = live_intervals->num_vars; 80 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); 81 BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1); 82 83 foreach_block_reverse_safe(block, cfg) { 84 memcpy(live, live_intervals->block_data[block->num].liveout, 85 sizeof(BITSET_WORD) * BITSET_WORDS(num_vars)); 86 memcpy(flag_live, live_intervals->block_data[block->num].flag_liveout, 87 sizeof(BITSET_WORD)); 88 89 foreach_inst_in_block_reverse_safe(fs_inst, inst, block) { 90 if (inst->dst.file == VGRF) { 91 const unsigned var = live_intervals->var_from_reg(inst->dst); 92 bool result_live = false; 93 94 for (unsigned i = 0; i < regs_written(inst); i++) 95 result_live |= BITSET_TEST(live, var + i); 96 97 if (!result_live && 98 (can_omit_write(inst) || can_eliminate(inst, flag_live))) { 99 inst->dst = fs_reg(retype(brw_null_reg(), inst->dst.type)); 100 progress = true; 101 } 102 } 103 104 if (inst->dst.is_null() && can_eliminate(inst, flag_live)) { 105 inst->opcode = BRW_OPCODE_NOP; 106 progress = true; 107 } 108 109 if (inst->dst.file == VGRF) { 110 if (!inst->is_partial_write()) { 111 int var = live_intervals->var_from_reg(inst->dst); 112 for (unsigned i = 0; i < regs_written(inst); i++) { 113 BITSET_CLEAR(live, var + i); 114 } 115 } 116 } 117 118 if (!inst->predicate && inst->exec_size >= 8) 119 flag_live[0] &= ~inst->flags_written(); 120 121 if (inst->opcode == BRW_OPCODE_NOP) { 122 inst->remove(block); 123 continue; 124 } 125 126 for (int i = 0; i < inst->sources; i++) { 127 if (inst->src[i].file == VGRF) { 128 int var = live_intervals->var_from_reg(inst->src[i]); 129 130 for (unsigned j = 0; j < regs_read(inst, i); j++) { 131 BITSET_SET(live, var + j); 132 } 133 } 134 } 135 136 flag_live[0] |= inst->flags_read(devinfo); 137 } 138 } 139 140 ralloc_free(live); 141 ralloc_free(flag_live); 142 143 if (progress) 144 invalidate_live_intervals(); 145 146 return progress; 147} 148