Searched refs:compmask (Results 1 - 24 of 24) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/
H A Dir3_shader.h372 * + Let the frag shader determine the position/compmask for the
404 uint8_t compmask; member in struct:ir3_shader_variant::__anon6c2d57490608
594 if (so->inputs[i].compmask && so->inputs[i].bary)
604 uint8_t compmask; member in struct:ir3_shader_linkage::__anon6c2d57490a08
610 ir3_link_add(struct ir3_shader_linkage *l, uint8_t regid, uint8_t compmask, uint8_t loc) argument
617 l->var[i].compmask = compmask;
619 l->max_loc = MAX2(l->max_loc, loc + util_last_bit(compmask));
641 fs->inputs[j].compmask, fs->inputs[j].inloc);
H A Dir3_shader.c84 if (v->inputs[i].compmask) {
85 unsigned n = util_last_bit(v->inputs[i].compmask) - 1;
379 so->inputs[i].compmask,
400 so->inputs[i].compmask,
H A Dir3_compiler_nir.c66 create_input_compmask(struct ir3_context *ctx, unsigned n, unsigned compmask) argument
74 in->regs[0]->wrmask = compmask;
1107 gl_system_value slot, unsigned compmask,
1116 so->inputs[n].compmask = compmask;
2377 so->inputs[n].compmask = (1 << (ncomp + frac)) - 1;
2495 unsigned compmask = 0, maxcomp = 0; local in function:pack_inlocs
2505 compmask |= (1 << j);
2519 so->inputs[i].compmask = (1 << maxcomp) - 1;
1106 add_sysval_input_compmask(struct ir3_context * ctx,gl_system_value slot,unsigned compmask,struct ir3_instruction * instr) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a3xx/
H A Dfd3_program.c285 reg |= A3XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
289 reg |= A3XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
386 /* NOTE: varyings are packed, so if compmask is 0xb
390 unsigned compmask = fp->inputs[j].compmask; local in function:fd3_program_emit
399 if (compmask & (1 << i)) {
423 if (compmask & 0x1) {
427 if (compmask & 0x2) {
431 if (compmask & 0x4) {
436 if (compmask
[all...]
H A Dfd3_emit.c371 if (!vp->inputs[i].compmask)
398 if (vp->inputs[i].compmask) {
434 A3XX_VFD_DECODE_INSTR_WRITEMASK(vp->inputs[i].compmask) |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a3xx/
H A Dfd3_program.c259 reg |= A3XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
263 reg |= A3XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
362 /* NOTE: varyings are packed, so if compmask is 0xb
366 unsigned compmask = fp->inputs[j].compmask; local in function:fd3_program_emit
375 if (compmask & (1 << i)) {
392 if (compmask & 0x1) {
396 if (compmask & 0x2) {
400 if (compmask & 0x4) {
405 if (compmask
[all...]
H A Dfd3_emit.c389 if (!vp->inputs[i].compmask)
413 if (vp->inputs[i].compmask) {
452 A3XX_VFD_DECODE_INSTR_WRITEMASK(vp->inputs[i].compmask) |
461 total_in += util_bitcount(vp->inputs[i].compmask);
/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_shader.h544 * + Let the frag shader determine the position/compmask for the
590 uint8_t compmask; member in struct:ir3_shader_variant::__anon448bd35c0608
858 if (so->inputs[i].compmask && so->inputs[i].bary)
880 uint8_t compmask; member in struct:ir3_shader_linkage::__anon448bd35c0808
895 ir3_link_add(struct ir3_shader_linkage *l, uint8_t regid_, uint8_t compmask, argument
898 for (int j = 0; j < util_last_bit(compmask); j++) {
903 l->max_loc = MAX2(l->max_loc, loc + util_last_bit(compmask));
910 l->var[i].compmask = compmask;
963 fs->inputs[j].compmask, f
[all...]
H A Dir3_shader.c80 if (v->inputs[i].compmask) {
81 unsigned n = util_last_bit(v->inputs[i].compmask) - 1;
719 so->inputs[i].compmask, so->inputs[i].inloc, so->inputs[i].bary);
813 unsigned compmask = local in function:ir3_link_stream_out
832 ir3_link_add(l, v->outputs[k].regid, compmask, nextloc);
837 if (compmask & ~l->var[idx].compmask) {
838 l->var[idx].compmask |= compmask;
840 l->max_loc, l->var[idx].loc + util_last_bit(l->var[idx].compmask));
[all...]
H A Dir3_compiler_nir.c64 create_input(struct ir3_context *ctx, unsigned compmask) argument
70 __ssa_dst(in)->wrmask = compmask;
1455 unsigned compmask, struct ir3_instruction *instr)
1466 so->inputs[n].compmask = compmask;
1469 so->sysval_in += util_last_bit(compmask);
1474 unsigned compmask)
1476 assert(compmask);
1477 struct ir3_instruction *sysval = create_input(ctx, compmask);
1478 add_sysval_input_compmask(ctx, slot, compmask, sysva
1454 add_sysval_input_compmask(struct ir3_context * ctx,gl_system_value slot,unsigned compmask,struct ir3_instruction * instr) argument
1473 create_sysval_input(struct ir3_context * ctx,gl_system_value slot,unsigned compmask) argument
3331 unsigned compmask; local in function:setup_input
3465 unsigned compmask = 0, maxcomp = 0; local in function:pack_inlocs
[all...]
H A Dir3_parser.y230 static void add_sysval(unsigned reg, unsigned compmask, gl_system_value sysval)
236 variant->inputs[n].compmask = compmask;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_program.c153 unsigned compmask = local in function:link_stream_out
172 ir3_link_add(l, v->outputs[k].regid, compmask, nextloc);
177 if (compmask & ~l->var[idx].compmask) {
178 l->var[idx].compmask |= compmask;
180 l->var[idx].loc + util_last_bit(l->var[idx].compmask));
438 for (j = 0; j < util_last_bit(l.var[i].compmask); j++)
466 reg |= A6XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
470 reg |= A6XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
633 unsigned compmask = s[FS].v->inputs[j].compmask; local in function:setup_stateobj
704 unsigned compmask = fs->inputs[j].compmask; local in function:fd6_program_emit
[all...]
H A Dfd6_emit.c640 if (vp->inputs[i].compmask) {
674 OUT_RING(ring, A6XX_VFD_DEST_CNTL_INSTR_WRITEMASK(vp->inputs[i].compmask) |
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a5xx/
H A Dfd5_program.c137 unsigned compmask = local in function:link_stream_out
156 ir3_link_add(l, v->outputs[k].regid, compmask, nextloc);
161 if (compmask & ~l->var[idx].compmask) {
162 l->var[idx].compmask |= compmask;
164 l->var[idx].loc + util_last_bit(l->var[idx].compmask));
460 for (j = 0; j < util_last_bit(l.var[i].compmask); j++)
495 reg |= A5XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
499 reg |= A5XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
645 unsigned compmask = s[FS].v->inputs[j].compmask; local in function:fd5_program_emit
[all...]
H A Dfd5_emit.c455 if (vp->inputs[i].compmask) {
489 OUT_RING(ring, A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(vp->inputs[i].compmask) |
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a4xx/
H A Dfd4_program.c337 reg |= A4XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
341 reg |= A4XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
484 /* NOTE: varyings are packed, so if compmask is 0xb
488 unsigned compmask = s[FS].v->inputs[j].compmask; local in function:fd4_program_emit
497 if (compmask & (1 << i)) {
521 if (compmask & 0x1) {
525 if (compmask & 0x2) {
529 if (compmask & 0x4) {
534 if (compmask
[all...]
H A Dfd4_emit.c375 if (!vp->inputs[i].compmask)
402 if (vp->inputs[i].compmask) {
437 A4XX_VFD_DECODE_INSTR_WRITEMASK(vp->inputs[i].compmask) |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a4xx/
H A Dfd4_program.c312 reg |= A4XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
316 reg |= A4XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
480 /* NOTE: varyings are packed, so if compmask is 0xb
484 unsigned compmask = s[FS].v->inputs[j].compmask; local in function:fd4_program_emit
493 if (compmask & (1 << i)) {
511 if (compmask & 0x1) {
515 if (compmask & 0x2) {
519 if (compmask & 0x4) {
524 if (compmask
[all...]
H A Dfd4_emit.c387 if (!vp->inputs[i].compmask)
411 if (vp->inputs[i].compmask) {
449 A4XX_VFD_DECODE_INSTR_WRITEMASK(vp->inputs[i].compmask) |
458 total_in += util_bitcount(vp->inputs[i].compmask);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a5xx/
H A Dfd5_program.c452 reg |= A5XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
456 reg |= A5XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
626 /* NOTE: varyings are packed, so if compmask is 0xb
630 unsigned compmask = s[FS].v->inputs[j].compmask; local in function:fd5_program_emit
639 if (compmask & (1 << i)) {
657 if (compmask & 0x1) {
661 if (compmask & 0x2) {
665 if (compmask & 0x4) {
670 if (compmask
[all...]
H A Dfd5_emit.c481 if (vp->inputs[i].compmask) {
520 A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(vp->inputs[i].compmask) |
/xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/
H A Dtu_pipeline.c510 const uint32_t comp_count = util_last_bit(linkage.var[i].compmask);
545 A6XX_SP_VS_OUT_REG_A_COMPMASK(linkage.var[i].compmask);
598 const uint32_t compmask = fs->inputs[index].compmask; local in function:tu6_vpc_varying_mode
600 /* NOTE: varyings are packed, so if compmask is 0xb then first, second, and
607 if (compmask & 0x1) {
611 if (compmask & 0x2) {
615 if (compmask & 0x4) {
619 if (compmask & 0x8) {
626 if (compmask
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_program.c621 reg |= A6XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask);
625 reg |= A6XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask);
1050 assert(vs->inputs[i].compmask);
1052 A6XX_VFD_DEST_CNTL_INSTR_WRITEMASK(vs->inputs[i].compmask) |
1128 /* NOTE: varyings are packed, so if compmask is 0xb
1132 unsigned compmask = fs->inputs[j].compmask; local in function:emit_interp_state
1140 if (compmask & (1 << i)) {
1156 if (compmask & 0x1) {
1160 if (compmask
[all...]
/xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/
H A Dtu_pipeline.c1068 A6XX_SP_VS_OUT_REG_A_COMPMASK(linkage.var[i].compmask);
1272 const uint32_t compmask = fs->inputs[index].compmask; local in function:tu6_vpc_varying_mode
1274 /* NOTE: varyings are packed, so if compmask is 0xb then first, second, and
1281 if (compmask & 0x1) {
1285 if (compmask & 0x2) {
1289 if (compmask & 0x4) {
1293 if (compmask & 0x8) {
1299 if (compmask & (1 << i)) {
1808 .writemask = vs->inputs[input_idx].compmask,
[all...]

Completed in 39 milliseconds