| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/ |
| r200_blit.h | 44 struct radeon_bo *dst_bo,
|
| r200_blit.c | 369 struct radeon_bo *dst_bo)
381 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
460 * @param[in] dst_bo destination radeon buffer object
461 * @param[in] dst_offset offset of the destination image in the @a dst_bo
481 struct radeon_bo *dst_bo,
515 if (src_bo == dst_bo) {
532 _mesa_get_format_name(dst_mesaformat), dst_bo);
541 if (!validate_buffers(r200, src_bo, dst_bo))
549 emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/ |
| radeon_blit.h | 44 struct radeon_bo *dst_bo,
|
| radeon_blit.c | 218 struct radeon_bo *dst_bo)
230 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
312 * @param[in] dst_bo destination radeon buffer object
313 * @param[in] dst_offset offset of the destination image in the @a dst_bo
333 struct radeon_bo *dst_bo,
367 if (src_bo == dst_bo) {
384 _mesa_get_format_name(dst_mesaformat), dst_bo);
393 if (!validate_buffers(r100, src_bo, dst_bo))
401 emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/ |
| r200_blit.h | 44 struct radeon_bo *dst_bo,
|
| r200_blit.c | 379 struct radeon_bo *dst_bo)
391 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
470 * @param[in] dst_bo destination radeon buffer object
471 * @param[in] dst_offset offset of the destination image in the @a dst_bo
491 struct radeon_bo *dst_bo,
525 if (src_bo == dst_bo) {
542 _mesa_get_format_name(dst_mesaformat), dst_bo);
551 if (!validate_buffers(r200, src_bo, dst_bo))
559 emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/ |
| radeon_blit.h | 44 struct radeon_bo *dst_bo,
|
| radeon_blit.c | 227 struct radeon_bo *dst_bo)
239 dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
321 * @param[in] dst_bo destination radeon buffer object
322 * @param[in] dst_offset offset of the destination image in the @a dst_bo
342 struct radeon_bo *dst_bo,
376 if (src_bo == dst_bo) {
393 _mesa_get_format_name(dst_mesaformat), dst_bo);
402 if (!validate_buffers(r100, src_bo, dst_bo))
410 emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/ |
| intel_blit.h | 61 drm_intel_bo *dst_bo,
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/ |
| intel_blit.h | 61 drm_intel_bo *dst_bo,
|
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| sna_io.c | 230 struct kgem_bo *dst_bo; local
360 dst_bo = kgem_create_buffer_2d(kgem,
366 if (!dst_bo) {
374 &tmp, dst_bo, -tile.x1, -tile.y1,
376 kgem_bo_destroy(&sna->kgem, dst_bo);
382 kgem_bo_submit(&sna->kgem, dst_bo);
383 kgem_buffer_read_sync(kgem, dst_bo);
388 dst_bo->pitch, dst->devKind,
398 kgem_bo_destroy(&sna->kgem, dst_bo);
405 dst_bo = kgem_create_buffer_2d(kgem
[all...] |
| gen8_render.c | 2796 struct kgem_bo *dst_bo,
2805 untiled_tlb_miss(dst_bo))
2811 if (force_blt_ring(sna, dst_bo))
2815 (sna->render_state.gt < 3 && src_bo == dst_bo)) &&
2816 can_switch_to_blt(sna, dst_bo, flags))
2819 if (kgem_bo_is_render(dst_bo) ||
2825 can_switch_to_blt(sna, dst_bo, flags))
2828 if (prefer_render_ring(sna, dst_bo))
2831 if (!prefer_blt_ring(sna, dst_bo, flags))
2834 return prefer_blt_bo(sna, src_bo, dst_bo);
[all...] |
| gen9_render.c | 2875 struct kgem_bo *dst_bo,
2884 untiled_tlb_miss(dst_bo))
2890 if (force_blt_ring(sna, dst_bo))
2894 (sna->render_state.gt < 3 && src_bo == dst_bo)) &&
2895 can_switch_to_blt(sna, dst_bo, flags))
2898 if (kgem_bo_is_render(dst_bo) ||
2904 can_switch_to_blt(sna, dst_bo, flags))
2907 if (prefer_render_ring(sna, dst_bo))
2910 if (!prefer_blt_ring(sna, dst_bo, flags))
2913 return prefer_blt_bo(sna, src_bo, dst_bo);
[all...] |
| sna_render.h | 273 const DrawableRec *dst, struct kgem_bo *dst_bo,
276 PixmapPtr dst, struct kgem_bo *dst_bo,
282 bool (*fill_one)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo,
286 bool (*clear)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo);
290 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
300 PixmapPtr dst, struct kgem_bo *dst_bo,
737 const DrawableRec *dst, struct kgem_bo *dst_bo,
742 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
747 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
790 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy
[all...] |
| gen6_render.c | 2741 struct kgem_bo *dst_bo,
2756 if ((flags & COPY_SMALL || src_bo == dst_bo) &&
2757 can_switch_to_blt(sna, dst_bo, flags))
2761 untiled_tlb_miss(dst_bo))
2764 if (force_blt_ring(sna, dst_bo))
2767 if (kgem_bo_is_render(dst_bo) ||
2772 can_switch_to_blt(sna, dst_bo, flags))
2775 if (prefer_render_ring(sna, dst_bo))
2778 if (!prefer_blt_ring(sna, dst_bo, flags))
2781 return prefer_blt_bo(sna, src_bo, dst_bo);
[all...] |
| gen7_render.c | 2957 struct kgem_bo *dst_bo,
2966 untiled_tlb_miss(dst_bo))
2972 if (force_blt_ring(sna, dst_bo))
2976 (sna->render_state.gt < 3 && src_bo == dst_bo)) &&
2977 can_switch_to_blt(sna, dst_bo, flags))
2980 if (kgem_bo_is_render(dst_bo) ||
2986 can_switch_to_blt(sna, dst_bo, flags))
2989 if (prefer_render_ring(sna, dst_bo))
2992 if (!prefer_blt_ring(sna, dst_bo, flags))
2995 return prefer_blt_bo(sna, src_bo, dst_bo);
[all...] |
| sna_tiling.c | 599 const DrawableRec *dst, struct kgem_bo *dst_bo,
615 max_size = sna_max_tile_copy_size(sna, dst_bo, dst_bo);
676 dst, dst_bo, 0, 0,
688 dst, dst_bo, dx, dy,
789 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
800 !kgem_bo_can_blt(&sna->kgem, dst_bo)) {
805 kgem_bo_can_blt(&sna->kgem, dst_bo)));
809 max_size = sna_max_tile_copy_size(sna, src_bo, dst_bo);
878 dst_bo, dst_dx, dst_dy
[all...] |
| gen2_render.c | 2772 const DrawableRec *dst, struct kgem_bo *dst_bo,
2795 dst_bo, dst->bitsPerPixel,
2804 const DrawableRec *dst, struct kgem_bo *dst_bo,
2818 dst, dst_bo,
2822 dst, dst_bo,
2832 dst_bo->pitch < 8 || dst_bo->pitch > MAX_3D_PITCH ||
2839 assert(dst_bo->pitch >= 8);
2841 dst, dst_bo, box, n);
2863 tmp.dst.bo = dst_bo;
3275 struct kgem_bo *dst_bo; local
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| sna_io.c | 228 struct kgem_bo *dst_bo; local
355 dst_bo = kgem_create_buffer_2d(kgem,
361 if (!dst_bo) {
369 &tmp, dst_bo, -tile.x1, -tile.y1,
371 kgem_bo_destroy(&sna->kgem, dst_bo);
377 kgem_bo_submit(&sna->kgem, dst_bo);
378 kgem_buffer_read_sync(kgem, dst_bo);
383 dst_bo->pitch, dst->devKind,
393 kgem_bo_destroy(&sna->kgem, dst_bo);
400 dst_bo = kgem_create_buffer_2d(kgem
[all...] |
| sna_render.h | 267 const DrawableRec *dst, struct kgem_bo *dst_bo,
270 PixmapPtr dst, struct kgem_bo *dst_bo,
276 bool (*fill_one)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo,
280 bool (*clear)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo);
284 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
292 PixmapPtr dst, struct kgem_bo *dst_bo,
647 const DrawableRec *dst, struct kgem_bo *dst_bo,
652 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
657 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
700 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy
[all...] |
| gen8_render.c | 2695 struct kgem_bo *dst_bo,
2703 if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags))
2707 untiled_tlb_miss(dst_bo))
2713 if (kgem_bo_is_render(dst_bo) ||
2717 if (prefer_render_ring(sna, dst_bo))
2720 if (!prefer_blt_ring(sna, dst_bo, flags))
2723 return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo);
2729 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
2737 src_bo == dst_bo,
[all...] |
| sna_tiling.c | 599 const DrawableRec *dst, struct kgem_bo *dst_bo,
615 max_size = sna_max_tile_copy_size(sna, dst_bo, dst_bo);
676 dst, dst_bo, 0, 0,
688 dst, dst_bo, dx, dy,
789 struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
800 !kgem_bo_can_blt(&sna->kgem, dst_bo)) {
805 kgem_bo_can_blt(&sna->kgem, dst_bo)));
809 max_size = sna_max_tile_copy_size(sna, src_bo, dst_bo);
878 dst_bo, dst_dx, dst_dy
[all...] |
| gen6_render.c | 2667 struct kgem_bo *dst_bo,
2679 if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags))
2683 untiled_tlb_miss(dst_bo))
2689 if (kgem_bo_is_render(dst_bo) ||
2693 if (prefer_render_ring(sna, dst_bo))
2696 if (!prefer_blt_ring(sna, dst_bo, flags))
2699 return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo);
2705 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
2713 src_bo == dst_bo,
[all...] |
| gen7_render.c | 2873 struct kgem_bo *dst_bo,
2881 if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags))
2885 untiled_tlb_miss(dst_bo))
2891 if (kgem_bo_is_render(dst_bo) ||
2895 if (prefer_render_ring(sna, dst_bo))
2898 if (!prefer_blt_ring(sna, dst_bo, flags))
2901 return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo);
2907 const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy,
2915 src_bo == dst_bo,
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_meta_buffer.c | 243 struct radeon_winsys_bo *dst_bo, uint64_t src_offset, uint64_t dst_offset,
255 radv_buffer_init(&dst_buffer, cmd_buffer->device, dst_bo, size, dst_offset);
292 struct radeon_winsys_bo *src_bo, struct radeon_winsys_bo *dst_bo)
299 !(dst_bo->initial_domain & RADEON_DOMAIN_VRAM)) {
338 struct radeon_winsys_bo *dst_bo, uint64_t src_offset, uint64_t dst_offset,
342 radv_prefer_compute_dma(cmd_buffer->device, size, src_bo, dst_bo);
345 copy_buffer_shader(cmd_buffer, src_bo, dst_bo, src_offset, dst_offset, size);
348 uint64_t dst_va = radv_buffer_get_va(dst_bo);
353 radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, dst_bo);
|
