Searched refs:engine_setup (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/tools/
H A Daub_write.h65 } engine_setup[I915_ENGINE_CLASS_VIDEO_ENHANCE + 1]; member in struct:aub_file
H A Daub_write.c464 aub->engine_setup[engine_class].ring_addr = phys_addr;
474 aub->engine_setup[engine_class].pphwsp_addr = phys_addr;
475 aub->engine_setup[engine_class].descriptor = cs->hw_class | phys_addr | CONTEXT_FLAGS;
486 .ring_addr = aub->engine_setup[engine_class].ring_addr,
505 register_write_out(aub, HWS_PGA_RCSUNIT, aub->engine_setup[I915_ENGINE_CLASS_RENDER].pphwsp_addr);
506 register_write_out(aub, HWS_PGA_VCSUNIT0, aub->engine_setup[I915_ENGINE_CLASS_VIDEO].pphwsp_addr);
507 register_write_out(aub, HWS_PGA_BCSUNIT, aub->engine_setup[I915_ENGINE_CLASS_COPY].pphwsp_addr);
664 mem_trace_memory_write_header_out(aub, aub->engine_setup[cs->engine_class].ring_addr, 16,
672 mem_trace_memory_write_header_out(aub, aub->engine_setup[cs->engine_class].ring_addr + 8192 + 20, 4,
676 mem_trace_memory_write_header_out(aub, aub->engine_setup[c
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Daub_write.h99 } engine_setup[I915_ENGINE_CLASS_VIDEO_ENHANCE + 1]; member in struct:aub_file
H A Daub_write.c514 register_write_out(aub, reg, aub->engine_setup[engine_class].hwsp_addr);
815 uint64_t *hwsp_addr = &aub->engine_setup[engine_class].hwsp_addr;

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