Searched refs:index_va (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_state_draw.c676 uint64_t index_va = 0; local in function:si_emit_draw_packets
730 index_va = si_resource(indexbuf)->gpu_address + index_offset;
766 radeon_emit(cs, index_va);
767 radeon_emit(cs, index_va >> 32);
850 index_va += info->start * index_size;
854 radeon_emit(cs, index_va);
855 radeon_emit(cs, index_va >> 32);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_state_draw.cpp1344 uint64_t index_va = 0; local in function:si_emit_draw_packets
1389 index_va = si_resource(indexbuf)->gpu_address + index_offset;
1426 radeon_emit(index_va);
1427 radeon_emit(index_va >> 32);
1546 uint64_t va = index_va + draws[i].start * index_size;
1568 uint64_t va = index_va + draws[i].start * index_size;
1587 uint64_t va = index_va + draws[i].start * index_size;
1614 uint64_t va = index_va + draws[i].start * index_size;
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c1676 radeon_emit(cs, state->index_va);
1677 radeon_emit(cs, state->index_va >> 32);
2736 cmd_buffer->state.index_va = radv_buffer_get_va(index_buffer->bo);
2737 cmd_buffer->state.index_va += index_buffer->offset + offset;
3589 uint64_t index_va,
3594 radeon_emit(cmd_buffer->cs, index_va);
3595 radeon_emit(cmd_buffer->cs, index_va >> 32);
3716 uint64_t index_va; local in function:radv_emit_draw_packets
3718 index_va = state->index_va;
3588 radv_cs_emit_draw_indexed_packet(struct radv_cmd_buffer * cmd_buffer,uint64_t index_va,uint32_t index_count) argument
[all...]
H A Dradv_private.h1051 uint64_t index_va; member in struct:radv_cmd_state
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c2594 * the index_va and max_index_count already. */
2599 radeon_emit(cs, state->index_va);
2600 radeon_emit(cs, state->index_va >> 32);
4550 cmd_buffer->state.index_va = radv_buffer_get_va(index_buffer->bo);
4551 cmd_buffer->state.index_va += index_buffer->offset + offset;
5954 * The starting address "index_va" may point anywhere within the index buffer. The number of
5959 radv_cs_emit_draw_indexed_packet(struct radv_cmd_buffer *cmd_buffer, uint64_t index_va, argument
5964 radeon_emit(cmd_buffer->cs, index_va);
5965 radeon_emit(cmd_buffer->cs, index_va >> 32);
6109 const uint64_t index_va local in function:radv_emit_draw_packets_indexed
6138 const uint64_t index_va = state->index_va + draw->firstIndex * index_size; local in function:radv_emit_draw_packets_indexed
6177 const uint64_t index_va = state->index_va + draw->firstIndex * index_size; local in function:radv_emit_draw_packets_indexed
6202 const uint64_t index_va = state->index_va + draw->firstIndex * index_size; local in function:radv_emit_draw_packets_indexed
[all...]
H A Dradv_private.h1374 uint64_t index_va; member in struct:radv_cmd_state
/xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/
H A Dpanvk_private.h590 uint64_t index_va; member in struct:panvk_cmd_state::__anon9e4fc0281f08
/xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/
H A Dtu_private.h841 uint64_t index_va; member in struct:tu_cmd_state
/xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/
H A Dtu_private.h992 uint64_t index_va; member in struct:tu_cmd_state
H A Dtu_cmd_buffer.c1741 cmd->state.index_va = buf->bo->iova + buf->bo_offset + offset;
4221 tu_cs_emit_qw(cs, cmd->state.index_va);
4289 tu_cs_emit_qw(cs, cmd->state.index_va);
4355 tu_cs_emit_qw(cs, cmd->state.index_va);
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D21.2.0.rst3944 - radv: declare index_va in a single call for indexed draw packet emit

Completed in 50 milliseconds