| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| H A D | r500_fragprog_emit.c | 325 code->inst[ip].inst3 |= inst->RGB.Omod << R500_ALU_RGB_OMOD_SHIFT; 336 code->inst[ip].inst3 |= translate_arg_rgb(inst, 0) << R500_ALU_RGB_SEL_A_SHIFT; 337 code->inst[ip].inst3 |= translate_arg_rgb(inst, 1) << R500_ALU_RGB_SEL_B_SHIFT; 344 code->inst[ip].inst3 |= R500_ALU_RGB_TARGET(inst->RGB.Target); 348 code->inst[ip].inst3 |= R500_ALU_RGB_WMASK; 433 code->inst[ip].inst3 = 518 s->Code->inst[newip].inst3 = R500_FC_INT_ADDR(0) 523 s->Code->inst[loop->BgnLoop].inst3 = R500_FC_INT_ADDR(0) 529 s->Code->inst[loop->Brks[loop->BrkCount]].inst3 = 535 s->Code->inst[loop->Conts[loop->ContCount]].inst3 [all...] |
| H A D | r500_fragprog.c | 415 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3); 416 inst = code->inst[n].inst3; 509 inst = code->inst[n].inst3; 516 inst = code->inst[n].inst3; 535 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
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| H A D | radeon_code.h | 229 uint32_t inst3; member in struct:r500_fragment_program_code::__anon5cc527f80a08
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| H A D | r500_fragprog_emit.c | 327 code->inst[ip].inst3 |= inst->RGB.Omod << R500_ALU_RGB_OMOD_SHIFT; 338 code->inst[ip].inst3 |= translate_arg_rgb(inst, 0) << R500_ALU_RGB_SEL_A_SHIFT; 339 code->inst[ip].inst3 |= translate_arg_rgb(inst, 1) << R500_ALU_RGB_SEL_B_SHIFT; 346 code->inst[ip].inst3 |= R500_ALU_RGB_TARGET(inst->RGB.Target); 350 code->inst[ip].inst3 |= R500_ALU_RGB_WMASK; 435 code->inst[ip].inst3 = 520 s->Code->inst[newip].inst3 = R500_FC_INT_ADDR(0) 525 s->Code->inst[loop->BgnLoop].inst3 = R500_FC_INT_ADDR(0) 531 s->Code->inst[loop->Brks[loop->BrkCount]].inst3 = 537 s->Code->inst[loop->Conts[loop->ContCount]].inst3 [all...] |
| H A D | r500_fragprog.c | 414 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3); 415 inst = code->inst[n].inst3; 508 inst = code->inst[n].inst3; 515 inst = code->inst[n].inst3; 534 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
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| H A D | radeon_code.h | 229 uint32_t inst3; member in struct:r500_fragment_program_code::__anon210fac6b0a08
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| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i915_xvmc.c | 250 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, 254 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, 258 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, 262 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, 266 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0, 270 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1, 277 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, 284 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, 292 i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest, 301 i915_inst_arith(&pixel_shader_program->inst3[ [all...] |
| H A D | i915_structs.h | 670 uint32_t inst3[3 * 10]; member in struct:i915_3dstate_pixel_shader_program
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| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i915_xvmc.c | 250 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, 254 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, 258 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, 262 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, 266 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0, 270 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1, 277 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, 284 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, 292 i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest, 301 i915_inst_arith(&pixel_shader_program->inst3[ [all...] |
| H A D | i915_structs.h | 670 uint32_t inst3[3 * 10]; member in struct:i915_3dstate_pixel_shader_program
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/ |
| H A D | i915_xvmc.c | 287 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); 290 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY); 293 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY); 296 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY); 299 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D); 302 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D); 308 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1); 314 i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1); 321 i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest, A0_DEST_CHANNEL_ALL, 329 i915_inst_arith(&pixel_shader_program->inst3[ [all...] |
| H A D | i915_structs.h | 710 uint32_t inst3[3*10]; member in struct:i915_3dstate_pixel_shader_program
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/ |
| H A D | r300_fs.c | 278 OUT_CB(code->inst[i].inst3);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/ |
| H A D | r300_fs.c | 278 OUT_CB(code->inst[i].inst3);
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_acceleration_structure.c | 1090 nir_ssa_def *inst3 = local in function:build_leaf_shader 1110 nir_ssa_def *header_addr = nir_pack_64_2x32(&b, nir_channels(&b, inst3, 12)); 1169 nir_channel(&b, nir_unpack_64_2x32(&b, header_addr), 1), nir_channel(&b, inst3, 0), 1170 nir_channel(&b, inst3, 1)};
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