| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_nir_lower_mem_access_bit_sizes.c | 104 const int load_offset = nir_src_as_uint(*offset_src) % 4; local in function:lower_mem_load_bit_size 105 assert(load_offset % (bit_size / 8) == 0); 106 const unsigned load_comps32 = DIV_ROUND_UP(bytes_read + load_offset, 4); 108 * we offset into a component with load_offset. 112 nir_ssa_def *load = dup_mem_intrinsic(b, intrin, NULL, -load_offset, 114 result = nir_extract_bits(b, &load, 1, load_offset * 8, 122 int load_offset = 0; local in function:lower_mem_load_bit_size 123 while (load_offset < bytes_read) { 124 const unsigned bytes_left = bytes_read - load_offset; 131 assert(load_offset [all...] |
| H A D | brw_vec4_nir.cpp | 409 unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:brw::vec4_visitor::nir_emit_intrinsic 414 src = src_reg(ATTR, instr->const_index[0] + load_offset, 594 const unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:brw::vec4_visitor::nir_emit_intrinsic 596 assert(load_offset % 4 == 0); 600 unsigned offset = load_offset + shift * type_size; 651 unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:brw::vec4_visitor::nir_emit_intrinsic 652 unsigned aligned_offset = load_offset & ~15; 709 unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:brw::vec4_visitor::nir_emit_intrinsic 712 BRW_SWIZZLE4(load_offset % 16 / type_size, 713 load_offset [all...] |
| H A D | brw_fs_nir.cpp | 3501 const unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:fs_visitor::nir_emit_fs_intrinsic 3502 const unsigned target = l - FRAG_RESULT_DATA0 + load_offset; 4637 unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:fs_visitor::nir_emit_intrinsic 4638 assert(load_offset % type_sz(dest.type) == 0); 4642 src.offset = load_offset + instr->const_index[0] % 4; 4728 const unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:fs_visitor::nir_emit_intrinsic 4733 const unsigned offset_256b = load_offset / 32; 4743 push_reg.offset = load_offset - 32 * range->start; 4764 const unsigned base = load_offset + c * type_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_nir_lower_mem_access_bit_sizes.c | 95 const int load_offset = nir_src_as_uint(*offset_src) % 4; local in function:lower_mem_load_bit_size 96 assert(load_offset % (bit_size / 8) == 0); 97 const unsigned load_comps32 = DIV_ROUND_UP(bytes_read + load_offset, 4); 99 * we offset into a component with load_offset. 103 nir_ssa_def *load = dup_mem_intrinsic(b, intrin, NULL, -load_offset, 109 assert(load_offset % (bit_size / 8) == 0); 113 unsigned load_i = i + load_offset / (bit_size / 8); 120 int load_offset = 0; local in function:lower_mem_load_bit_size 121 while (load_offset < bytes_read) { 122 const unsigned bytes_left = bytes_read - load_offset; [all...] |
| H A D | brw_vec4_nir.cpp | 410 unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:brw::vec4_visitor::nir_emit_intrinsic 415 src = src_reg(ATTR, instr->const_index[0] + load_offset, 655 const unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:brw::vec4_visitor::nir_emit_intrinsic 657 assert(load_offset % 4 == 0); 661 unsigned offset = load_offset + shift * type_size; 711 unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:brw::vec4_visitor::nir_emit_intrinsic 712 offset_reg = brw_imm_ud(load_offset & ~15); 745 unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:brw::vec4_visitor::nir_emit_intrinsic 748 BRW_SWIZZLE4(load_offset % 16 / type_size, 749 load_offset [all...] |
| H A D | brw_fs_nir.cpp | 3382 const unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:fs_visitor::nir_emit_fs_intrinsic 3383 const unsigned target = l - FRAG_RESULT_DATA0 + load_offset; 4209 unsigned load_offset = nir_src_as_uint(instr->src[0]); local in function:fs_visitor::nir_emit_intrinsic 4210 assert(load_offset % type_sz(dest.type) == 0); 4214 src.offset = load_offset + instr->const_index[0] % 4; 4297 const unsigned load_offset = nir_src_as_uint(instr->src[1]); local in function:fs_visitor::nir_emit_intrinsic 4302 const unsigned offset_256b = load_offset / 32; 4312 push_reg.offset = load_offset - 32 * range->start; 4331 const unsigned base = load_offset + c * type_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/ir/gp/ |
| H A D | codegen.h | 138 gpir_codegen_load_off load_offset : 3; member in struct:__anon93fdc6de0808
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| H A D | disasm.c | 151 switch (instr->load_offset) { 164 printf("+unk%d", instr->load_offset);
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| H A D | codegen.c | 452 code->load_offset = gpir_codegen_load_off_none; 457 code->load_offset = gpir_codegen_load_off_none;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/gp/ |
| H A D | codegen.h | 138 gpir_codegen_load_off load_offset : 3; member in struct:__anonc788b6b10808
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| H A D | codegen.c | 478 code->load_offset = gpir_codegen_load_off_none; 483 code->load_offset = gpir_codegen_load_off_none;
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| H A D | disasm.c | 151 switch (instr->load_offset) { 164 fprintf(fp, "+unk%d", instr->load_offset);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/glsl/ |
| H A D | lower_shared_reference.cpp | 160 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, local in function:__anon9d6f96a50110::lower_shared_reference_visitor::handle_rvalue 163 base_ir->insert_before(load_offset); 164 base_ir->insert_before(assign(load_offset, offset)); 168 emit_access(mem_ctx, false, deref, load_offset, const_offset, row_major,
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| H A D | lower_ubo_reference.cpp | 381 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, local in function:__anonf648b2340110::lower_ubo_reference_visitor::handle_rvalue 384 base_ir->insert_before(load_offset); 385 base_ir->insert_before(assign(load_offset, offset)); 388 emit_access(mem_ctx, false, deref, load_offset, const_offset,
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| H A D | lower_shared_reference.cpp | 158 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, local in function:__anonc11af5520110::lower_shared_reference_visitor::handle_rvalue 161 base_ir->insert_before(load_offset); 162 base_ir->insert_before(assign(load_offset, offset)); 166 emit_access(mem_ctx, false, deref, load_offset, const_offset, row_major,
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| H A D | lower_ubo_reference.cpp | 379 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, local in function:__anon515fc8010110::lower_ubo_reference_visitor::handle_rvalue 382 base_ir->insert_before(load_offset); 383 base_ir->insert_before(assign(load_offset, offset)); 386 emit_access(mem_ctx, false, deref, load_offset, const_offset,
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_query.c | 173 nir_ssa_def *load_offset = nir_imul(&b, current_outer_count, nir_imm_int(&b, 16)); local in function:build_occlusion_query_shader 174 load_offset = nir_iadd(&b, input_base, load_offset); 176 nir_ssa_def *load = nir_load_ssbo(&b, 2, 64, src_buf, load_offset, .align_mul = 16);
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_query.c | 191 nir_ssa_def *load_offset = nir_imul(&b, current_outer_count, nir_imm_int(&b, 16)); local in function:build_occlusion_query_shader 192 load_offset = nir_iadd(&b, input_base, load_offset); 196 load->src[1] = nir_src_for_ssa(load_offset);
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