Searched refs:mmUVD_JPEG_CNTL (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeon/
H A Dradeon_vcn_dec_jpeg.c78 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 1);
88 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 0);
150 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 0x6);
165 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 0x4);
173 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 1);
181 set_reg_jpeg(dec, mmUVD_JPEG_CNTL, COND0, TYPE0, 0);
H A Dradeon_vcn_dec.h125 #define mmUVD_JPEG_CNTL 0x0200 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeon/
H A Dradeon_vcn_dec_jpeg.c71 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 1);
81 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0);
143 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0x6);
158 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0x4);
166 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 1);
174 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0);
H A Dradeon_vcn_dec.h130 #define mmUVD_JPEG_CNTL 0x0200 macro
/xsrc/external/mit/libdrm/dist/tests/amdgpu/
H A Djpeg_tests.c37 #define mmUVD_JPEG_CNTL 0x0200 macro
334 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 1);
344 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0);
402 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0x6);
419 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0x4);
429 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 1);
437 set_reg_jpeg(SOC15_REG_ADDR(mmUVD_JPEG_CNTL), COND0, TYPE0, 0);

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