Searched refs:mul (Results 1 - 25 of 136) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/lib/
H A Dgf100.asm19 mul $r3 u32 $r1 u32 $r2
20 add $r2 (mul high u32 $r2 u32 $r3) $r2
21 mul $r3 u32 $r1 u32 $r2
22 add $r2 (mul high u32 $r2 u32 $r3) $r2
23 mul $r3 u32 $r1 u32 $r2
24 add $r2 (mul high u32 $r2 u32 $r3) $r2
25 mul $r3 u32 $r1 u32 $r2
26 add $r2 (mul high u32 $r2 u32 $r3) $r2
27 mul $r3 u32 $r1 u32 $r2
28 add $r2 (mul hig
[all...]
H A Dgk104.asm20 long mul $r3 u32 $r1 u32 $r2
21 add $r2 (mul high u32 $r2 u32 $r3) $r2
23 mul $r3 u32 $r1 u32 $r2
24 add $r2 (mul high u32 $r2 u32 $r3) $r2
25 mul $r3 u32 $r1 u32 $r2
26 add $r2 (mul high u32 $r2 u32 $r3) $r2
27 mul $r3 u32 $r1 u32 $r2
28 add $r2 (mul high u32 $r2 u32 $r3) $r2
29 mul $r3 u32 $r1 u32 $r2
31 add $r2 (mul hig
110 mul f32 $r3 $r3 0x37800074 label
113 mul f32 $r2 $r2 0x37800074 label
115 mul f32 $r1 $r1 0x37800074 label
116 mul f32 $r0 $r0 0x37800074 label
126 mul f32 $r3 $r3 0x38000187 label
129 mul f32 $r2 $r2 0x38000187 label
131 mul f32 $r1 $r1 0x38000187 label
132 mul f32 $r0 $r0 0x38000187 label
199 mul f32 $r2 $r2 0x3a802007 label
201 mul f32 $r1 $r1 0x3a802007 label
202 mul f32 $r0 $r0 0x3a802007 label
223 mul f32 $r3 $r3 0x3b808081 label
226 mul f32 $r2 $r2 0x3b808081 label
228 mul f32 $r1 $r1 0x3b808081 label
229 mul f32 $r0 $r0 0x3b808081 label
239 mul f32 $r3 $r3 0x3c010204 label
242 mul f32 $r2 $r2 0x3c010204 label
244 mul f32 $r1 $r1 0x3c010204 label
245 mul f32 $r0 $r0 0x3c010204 label
282 mul f32 $r2 $r2 0x3d042108 label
285 mul f32 $r1 $r1 0x3c820821 label
286 mul f32 $r0 $r0 0x3d042108 label
302 mul f32 $r2 $r2 0x3d042108 label
303 mul f32 $r1 $r1 0x3d042108 label
304 mul f32 $r0 $r0 0x3d042108 label
314 mul f32 $r1 $r1 0x37800074 label
315 mul f32 $r0 $r0 0x37800074 label
330 mul f32 $r1 $r1 0x38000187 label
331 mul f32 $r0 $r0 0x38000187 label
398 mul f32 $r1 $r1 0x3b808081 label
399 mul f32 $r0 $r0 0x3b808081 label
411 mul f32 $r1 $r1 0x3c010204 label
412 mul f32 $r0 $r0 0x3c010204 label
447 mul f32 $r0 $r0 0x37800074 label
460 mul f32 $r0 $r0 0x38000187 label
503 mul f32 $r0 $r0 0x3b808081 label
515 mul f32 $r0 $r0 0x3c010204 label
873 mul $r2 u32 $r2 u32 c0[0x1914] // warp offset label
874 mul $r3 u32 $r3 u32 c0[0x1910] // MP offset label
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/lib/
H A Dgf100.asm19 mul $r3 u32 $r1 u32 $r2
20 add $r2 (mul high u32 $r2 u32 $r3) $r2
21 mul $r3 u32 $r1 u32 $r2
22 add $r2 (mul high u32 $r2 u32 $r3) $r2
23 mul $r3 u32 $r1 u32 $r2
24 add $r2 (mul high u32 $r2 u32 $r3) $r2
25 mul $r3 u32 $r1 u32 $r2
26 add $r2 (mul high u32 $r2 u32 $r3) $r2
27 mul $r3 u32 $r1 u32 $r2
28 add $r2 (mul hig
[all...]
H A Dgk104.asm20 long mul $r3 u32 $r1 u32 $r2
21 add $r2 (mul high u32 $r2 u32 $r3) $r2
23 mul $r3 u32 $r1 u32 $r2
24 add $r2 (mul high u32 $r2 u32 $r3) $r2
25 mul $r3 u32 $r1 u32 $r2
26 add $r2 (mul high u32 $r2 u32 $r3) $r2
27 mul $r3 u32 $r1 u32 $r2
28 add $r2 (mul high u32 $r2 u32 $r3) $r2
29 mul $r3 u32 $r1 u32 $r2
31 add $r2 (mul hig
110 mul f32 $r3 $r3 0x37800074 label
113 mul f32 $r2 $r2 0x37800074 label
115 mul f32 $r1 $r1 0x37800074 label
116 mul f32 $r0 $r0 0x37800074 label
126 mul f32 $r3 $r3 0x38000187 label
129 mul f32 $r2 $r2 0x38000187 label
131 mul f32 $r1 $r1 0x38000187 label
132 mul f32 $r0 $r0 0x38000187 label
199 mul f32 $r2 $r2 0x3a802007 label
201 mul f32 $r1 $r1 0x3a802007 label
202 mul f32 $r0 $r0 0x3a802007 label
223 mul f32 $r3 $r3 0x3b808081 label
226 mul f32 $r2 $r2 0x3b808081 label
228 mul f32 $r1 $r1 0x3b808081 label
229 mul f32 $r0 $r0 0x3b808081 label
239 mul f32 $r3 $r3 0x3c010204 label
242 mul f32 $r2 $r2 0x3c010204 label
244 mul f32 $r1 $r1 0x3c010204 label
245 mul f32 $r0 $r0 0x3c010204 label
282 mul f32 $r2 $r2 0x3d042108 label
285 mul f32 $r1 $r1 0x3c820821 label
286 mul f32 $r0 $r0 0x3d042108 label
302 mul f32 $r2 $r2 0x3d042108 label
303 mul f32 $r1 $r1 0x3d042108 label
304 mul f32 $r0 $r0 0x3d042108 label
314 mul f32 $r1 $r1 0x37800074 label
315 mul f32 $r0 $r0 0x37800074 label
330 mul f32 $r1 $r1 0x38000187 label
331 mul f32 $r0 $r0 0x38000187 label
398 mul f32 $r1 $r1 0x3b808081 label
399 mul f32 $r0 $r0 0x3b808081 label
411 mul f32 $r1 $r1 0x3c010204 label
412 mul f32 $r0 $r0 0x3c010204 label
447 mul f32 $r0 $r0 0x37800074 label
460 mul f32 $r0 $r0 0x38000187 label
503 mul f32 $r0 $r0 0x3b808081 label
515 mul f32 $r0 $r0 0x3c010204 label
873 mul $r2 u32 $r2 u32 c0[0x1914] // warp offset label
874 mul $r3 u32 $r3 u32 c0[0x1910] // MP offset label
[all...]
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dvir_opt_redundant_flags.c83 a->qpu.alu.mul.op != b->qpu.alu.mul.op ||
87 a->qpu.alu.mul.a_unpack != b->qpu.alu.mul.a_unpack ||
88 a->qpu.alu.mul.b_unpack != b->qpu.alu.mul.b_unpack ||
89 a->qpu.alu.mul.output_pack != b->qpu.alu.mul.output_pack) {
H A Dqpu_validate.c101 if (inst->alu.mul.op != V3D_QPU_M_NOP &&
102 inst->alu.mul.magic_write &&
103 predicate(inst->alu.mul.waddr))
171 if (inst->alu.mul.op != V3D_QPU_M_NOP) {
172 if (inst->alu.mul.magic_write) {
174 inst->alu.mul.waddr)) {
177 if (v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))
179 if (v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr))
181 if (v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr))
183 if (v3d_qpu_magic_waddr_is_tsy(inst->alu.mul
[all...]
H A Dvir_to_qpu.c59 .mul = {
111 instr->alu.mul.a != V3D_QPU_MUX_A &&
112 instr->alu.mul.b != V3D_QPU_MUX_A) {
121 instr->alu.mul.a == V3D_QPU_MUX_B &&
122 instr->alu.mul.b == V3D_QPU_MUX_B) ||
138 qinst->qpu.alu.mul.op != V3D_QPU_M_MOV ||
145 enum v3d_qpu_waddr waddr = qinst->qpu.alu.mul.waddr;
146 if (qinst->qpu.alu.mul.magic_write) {
150 if (qinst->qpu.alu.mul.a !=
157 switch (qinst->qpu.alu.mul
[all...]
H A Dvir_opt_copy_propagate.c44 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV &&
45 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) {
56 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) {
112 return inst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE;
114 return inst->qpu.alu.mul.b_unpack != V3D_QPU_UNPACK_NONE;
164 if (mov->qpu.alu.mul.a_unpack == V3D_QPU_UNPACK_ABS) {
192 enum v3d_qpu_input_unpack unpack = mov->qpu.alu.mul.a_unpack;
H A Dqpu_schedule.c144 if (inst->alu.mul.magic_write &&
145 (inst->alu.mul.waddr == V3D_QPU_WADDR_TLB ||
146 inst->alu.mul.waddr == V3D_QPU_WADDR_TLBU))
311 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 0)
312 process_mux_deps(state, n, inst->alu.mul.a);
313 if (v3d_qpu_mul_op_num_src(inst->alu.mul.op) > 1)
314 process_mux_deps(state, n, inst->alu.mul.b);
354 switch (inst->alu.mul.op) {
372 if (inst->alu.mul.op != V3D_QPU_M_NOP) {
373 process_waddr_deps(state, n, inst->alu.mul
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dvir_opt_redundant_flags.c83 a->qpu.alu.mul.op != b->qpu.alu.mul.op ||
87 a->qpu.alu.mul.a_unpack != b->qpu.alu.mul.a_unpack ||
88 a->qpu.alu.mul.b_unpack != b->qpu.alu.mul.b_unpack ||
89 a->qpu.alu.mul.output_pack != b->qpu.alu.mul.output_pack) {
H A Dqpu_validate.c101 if (inst->alu.mul.op != V3D_QPU_M_NOP &&
102 inst->alu.mul.magic_write &&
103 predicate(inst->alu.mul.waddr))
161 if (inst->alu.mul.op != V3D_QPU_M_NOP) {
162 if (inst->alu.mul.magic_write) {
163 if (v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))
165 if (v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))
167 if (v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr))
169 if (v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr))
171 if (v3d_qpu_magic_waddr_is_tsy(inst->alu.mul
[all...]
H A Dvir_to_qpu.c65 .mul = {
117 instr->alu.mul.a != V3D_QPU_MUX_A &&
118 instr->alu.mul.b != V3D_QPU_MUX_A) {
127 instr->alu.mul.a == V3D_QPU_MUX_B &&
128 instr->alu.mul.b == V3D_QPU_MUX_B) ||
144 qinst->qpu.alu.mul.op != V3D_QPU_M_MOV ||
151 enum v3d_qpu_waddr waddr = qinst->qpu.alu.mul.waddr;
152 if (qinst->qpu.alu.mul.magic_write) {
156 if (qinst->qpu.alu.mul.a !=
163 switch (qinst->qpu.alu.mul
[all...]
H A Dvir_opt_copy_propagate.c44 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV &&
45 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) {
56 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) {
112 return inst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE;
114 return inst->qpu.alu.mul.b_unpack != V3D_QPU_UNPACK_NONE;
164 if (mov->qpu.alu.mul.a_unpack == V3D_QPU_UNPACK_ABS) {
192 enum v3d_qpu_input_unpack unpack = mov->qpu.alu.mul.a_unpack;
/xsrc/external/mit/mesa-demos/dist/src/vp/
H A DMakefile.am65 mul.txt \
68 psiz-mul-clamp.txt \
69 psiz-mul.txt \
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/
H A Detnaviv_nir.c176 /* change transcendental ops to vec2 and insert vec1 mul for the result
186 nir_alu_instr *mul = nir_alu_instr_create(shader, nir_op_fmul); local in function:etna_lower_alu_impl
187 mul->src[0].src = mul->src[1].src = nir_src_for_ssa(ssa);
188 mul->src[1].swizzle[0] = 1;
190 mul->dest.write_mask = 1;
191 nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
195 mul->dest.saturate = alu->dest.saturate;
198 nir_instr_insert_after(instr, &mul
[all...]
/xsrc/external/mit/MesaLib/dist/src/compiler/glsl/
H A Dlower_blend_equation_advanced.cpp43 return mul(src, dst);
50 return sub(add(src, dst), mul(src, dst));
61 ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst));
63 sub(imm3(1), mul(imm3(2), mul(sub(imm3(1), src), sub(imm3(1), dst))));
119 ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst));
121 sub(imm3(1), mul(imm3(2), mul(su
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/
H A Dlower_blend_equation_advanced.cpp43 return mul(src, dst);
50 return sub(add(src, dst), mul(src, dst));
61 ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst));
63 sub(imm3(1), mul(imm3(2), mul(sub(imm3(1), src), sub(imm3(1), dst))));
119 ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst));
121 sub(imm3(1), mul(imm3(2), mul(su
[all...]
/xsrc/external/mit/MesaLib/dist/src/broadcom/qpu/
H A Dqpu_instr.c651 if (inst->alu.mul.magic_write &&
652 v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) {
672 if (inst->alu.mul.magic_write &&
673 v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr)) {
707 (inst->alu.mul.magic_write &&
708 v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.mul.waddr))));
718 (!inst->alu.mul.magic_write ||
719 inst->alu.mul.waddr != V3D_QPU_WADDR_TMUC);
748 if (inst->alu.mul.magic_write &&
749 v3d_qpu_magic_waddr_is_vpm(inst->alu.mul
[all...]
H A Dqpu_disasm.c141 bool has_dst = v3d_qpu_mul_op_has_dst(instr->alu.mul.op);
142 int num_src = v3d_qpu_mul_op_num_src(instr->alu.mul.op);
147 append(disasm, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
153 if (instr->alu.mul.op == V3D_QPU_M_NOP)
159 v3d_qpu_disasm_waddr(disasm, instr->alu.mul.waddr,
160 instr->alu.mul.magic_write);
161 append(disasm, v3d_qpu_pack_name(instr->alu.mul.output_pack));
167 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.a);
169 v3d_qpu_unpack_name(instr->alu.mul.a_unpack));
174 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul
[all...]
/xsrc/external/mit/mesa-demos/dist/src/fp/
H A DMakefile.am74 mul-alias.txt \
75 mul-swz.txt \
76 mul.txt \
/xsrc/external/mit/mesa-demos/dist/src/vpglsl/
H A DMakefile.am52 psiz-mul.glsl \
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/qpu/
H A Dqpu_disasm.c141 bool has_dst = v3d_qpu_mul_op_has_dst(instr->alu.mul.op);
142 int num_src = v3d_qpu_mul_op_num_src(instr->alu.mul.op);
147 append(disasm, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
153 if (instr->alu.mul.op == V3D_QPU_M_NOP)
159 v3d_qpu_disasm_waddr(disasm, instr->alu.mul.waddr,
160 instr->alu.mul.magic_write);
161 append(disasm, v3d_qpu_pack_name(instr->alu.mul.output_pack));
167 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.a);
169 v3d_qpu_unpack_name(instr->alu.mul.a_unpack));
174 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul
[all...]
H A Dqpu_instr.c636 if (inst->alu.mul.magic_write &&
637 v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) {
666 if (inst->alu.mul.magic_write &&
667 v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr)) {
681 (inst->alu.mul.magic_write &&
682 v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))));
711 if (inst->alu.mul.magic_write &&
712 v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr)) {
736 if (inst->alu.mul.magic_write &&
737 inst->alu.mul
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_nir_opt_peephole_ffma.c194 nir_alu_instr *mul; local in function:brw_nir_opt_peephole_ffma_block
204 mul = get_mul_for_src(&add->src[add_mul_src],
208 if (mul != NULL)
212 if (mul == NULL)
218 mul_src[0] = mul->src[0].src.ssa;
219 mul_src[1] = mul->src[1].src.ssa;
225 if (any_alu_src_is_a_constant(mul->src) &&
247 ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_nir_opt_peephole_ffma.c191 nir_alu_instr *mul; local in function:brw_nir_opt_peephole_ffma_instr
201 mul = get_mul_for_src(&add->src[add_mul_src],
205 if (mul != NULL)
209 if (mul == NULL)
215 mul_src[0] = mul->src[0].src.ssa;
216 mul_src[1] = mul->src[1].src.ssa;
222 if (any_alu_src_is_a_constant(mul->src) &&
244 ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];

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