Searched refs:num_handles (Results 1 - 25 of 27) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/compiler/nir/
H A Dnir_lower_non_uniform_access.c114 unsigned num_handles = 0; local in function:lower_non_uniform_tex_access
136 assert(num_handles <= ARRAY_SIZE(handles));
137 if (nu_handle_init(&handles[num_handles], &tex->src[i].src))
138 num_handles++;
141 if (num_handles == 0)
149 for (unsigned i = 0; i < num_handles; i++) {
161 for (unsigned i = 0; i < num_handles; i++)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/d3d12/
H A Dd3d12_descriptor_pool.cpp176 unsigned num_handles)
180 assert(heap->next + (num_handles * heap->desc_size) <= heap->size);
182 heap->dev->CopyDescriptors(1, &dst, &num_handles,
183 num_handles, handles, NULL,
185 heap->next += num_handles * heap->desc_size;
174 d3d12_descriptor_heap_append_handles(struct d3d12_descriptor_heap * heap,D3D12_CPU_DESCRIPTOR_HANDLE * handles,unsigned num_handles) argument
H A Dd3d12_descriptor_pool.h95 unsigned num_handles);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_texture.c439 if (likely(!bound_handles->num_handles))
442 for (i = 0; i < bound_handles->num_handles; i++) {
450 bound_handles->num_handles = 0;
479 if (likely(!bound_handles->num_handles))
482 for (i = 0; i < bound_handles->num_handles; i++) {
490 bound_handles->num_handles = 0;
589 (bound_handles->num_handles + 1) * sizeof(uint64_t));
590 bound_handles->handles[bound_handles->num_handles] = handle;
591 bound_handles->num_handles++;
636 (bound_handles->num_handles
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H A Dst_context.h81 unsigned num_handles; member in struct:st_bound_handles
/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/
H A Dst_texture.c441 if (likely(!bound_handles->num_handles))
444 for (i = 0; i < bound_handles->num_handles; i++) {
452 bound_handles->num_handles = 0;
481 if (likely(!bound_handles->num_handles))
484 for (i = 0; i < bound_handles->num_handles; i++) {
492 bound_handles->num_handles = 0;
592 (bound_handles->num_handles + 1) * sizeof(uint64_t));
593 bound_handles->handles[bound_handles->num_handles] = handle;
594 bound_handles->num_handles++;
639 (bound_handles->num_handles
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H A Dst_context.h83 unsigned num_handles; member in struct:st_bound_handles
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/winsys/amdgpu/
H A Dradv_amdgpu_cs.c119 uint32_t num_handles; member in struct:radv_amdgpu_cs_request
668 unsigned num_handles = 0; local in function:radv_amdgpu_get_bo_list
679 num_handles++;
692 num_handles = cs->num_buffers;
695 num_handles = num_extra_bo;
732 if (num_handles == 0 && !cs->num_virtual_buffers) {
734 num_handles = cs->num_buffers;
737 int unique_bo_so_far = num_handles;
747 handles[num_handles] = cs->handles[j];
748 ++num_handles;
816 unsigned num_handles = 0; local in function:radv_amdgpu_winsys_cs_submit_chained
893 unsigned num_handles = 0; local in function:radv_amdgpu_winsys_cs_submit_fallback
986 unsigned num_handles = 0; local in function:radv_amdgpu_winsys_cs_submit_sysmem
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/xsrc/external/mit/libdrm/dist/amdgpu/
H A Damdgpu.h1677 * \param num_handles - \c [in] self-explanatory
1688 uint32_t *handles, unsigned num_handles,
1698 * \param num_handles - \c [in] self-explanatory
1710 unsigned num_handles,
1720 * \param num_handles - \c [in] self-explanatory
1729 unsigned num_handles);
1737 * \param num_handles - \c [in] self-explanatory
1747 unsigned num_handles, uint32_t flags);
H A Damdgpu_cs.c740 uint32_t *handles, unsigned num_handles,
747 return drmSyncobjWait(dev->fd, handles, num_handles, timeout_nsec,
753 unsigned num_handles,
760 return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
766 unsigned num_handles)
771 return drmSyncobjQuery(dev->fd, handles, points, num_handles);
776 unsigned num_handles, uint32_t flags)
781 return drmSyncobjQuery2(dev->fd, handles, points, num_handles, flags);
739 amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,uint32_t * handles,unsigned num_handles,int64_t timeout_nsec,unsigned flags,uint32_t * first_signaled) argument
751 amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,uint32_t * handles,uint64_t * points,unsigned num_handles,int64_t timeout_nsec,unsigned flags,uint32_t * first_signaled) argument
764 amdgpu_cs_syncobj_query(amdgpu_device_handle dev,uint32_t * handles,uint64_t * points,unsigned num_handles) argument
774 amdgpu_cs_syncobj_query2(amdgpu_device_handle dev,uint32_t * handles,uint64_t * points,unsigned num_handles,uint32_t flags) argument
/xsrc/external/mit/libdrm/dist/freedreno/kgsl/
H A Dkgsl_drm.h171 uint32_t num_handles; member in struct:drm_kgsl_gem_lock_handles
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_gem_stubs.c249 uint32_t *handles, uint32_t num_handles,
248 anv_gem_syncobj_wait(struct anv_device * device,uint32_t * handles,uint32_t num_handles,int64_t abs_timeout_ns,bool wait_all) argument
H A Danv_gem.c599 uint32_t *handles, uint32_t num_handles,
604 .count_handles = num_handles,
598 anv_gem_syncobj_wait(struct anv_device * device,uint32_t * handles,uint32_t num_handles,int64_t abs_timeout_ns,bool wait_all) argument
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_gem_stubs.c287 const uint32_t *handles, uint32_t num_handles,
286 anv_gem_syncobj_wait(struct anv_device * device,const uint32_t * handles,uint32_t num_handles,int64_t abs_timeout_ns,bool wait_all) argument
H A Danv_gem.c706 const uint32_t *handles, uint32_t num_handles,
711 .count_handles = num_handles,
705 anv_gem_syncobj_wait(struct anv_device * device,const uint32_t * handles,uint32_t num_handles,int64_t abs_timeout_ns,bool wait_all) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/amdgpu/drm/
H A Damdgpu_cs.c1298 unsigned num_handles = 0; local in function:amdgpu_cs_submit_ib
1308 list[num_handles].bo_handle = bo->u.real.kms_handle;
1309 list[num_handles].bo_priority = 0;
1310 ++num_handles;
1329 unsigned num_handles = 0; local in function:amdgpu_cs_submit_ib
1338 list[num_handles].bo_handle = buffer->bo->u.real.kms_handle;
1339 list[num_handles].bo_priority = (util_last_bit(buffer->u.real.priority_usage) - 1) / 2;
1340 ++num_handles;
1345 r = amdgpu_bo_list_create_raw(ws->dev, num_handles, list, &bo_list);
1354 bo_list_in.bo_number = num_handles;
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/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/amdgpu/drm/
H A Damdgpu_cs.c1409 unsigned num_handles = 0; local in function:amdgpu_cs_submit_ib
1416 list[num_handles].bo_handle = bo->u.real.kms_handle;
1417 list[num_handles].bo_priority = 0;
1418 ++num_handles;
1439 unsigned num_handles = 0; local in function:amdgpu_cs_submit_ib
1444 list[num_handles].bo_handle = buffer->bo->u.real.kms_handle;
1445 list[num_handles].bo_priority = (util_last_bit(buffer->u.real.priority_usage) - 1) / 2;
1446 ++num_handles;
1451 r = amdgpu_bo_list_create_raw(ws->dev, num_handles, list, &bo_list);
1460 bo_list_in.bo_number = num_handles;
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/virgl/
H A Dvirgl_encode.h175 uint32_t num_handles,
H A Dvirgl_encode.c669 uint32_t num_handles,
673 virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BIND_SAMPLER_STATES, 0, VIRGL_BIND_SAMPLER_STATES(num_handles)));
676 for (i = 0; i < num_handles; i++)
666 virgl_encode_bind_sampler_states(struct virgl_context * ctx,uint32_t shader_type,uint32_t start_slot,uint32_t num_handles,uint32_t * handles) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/virgl/
H A Dvirgl_encode.h185 uint32_t num_handles,
H A Dvirgl_encode.c1020 uint32_t num_handles,
1024 virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BIND_SAMPLER_STATES, 0, VIRGL_BIND_SAMPLER_STATES(num_handles)));
1027 for (i = 0; i < num_handles; i++)
1017 virgl_encode_bind_sampler_states(struct virgl_context * ctx,uint32_t shader_type,uint32_t start_slot,uint32_t num_handles,uint32_t * handles) argument
/xsrc/external/mit/libdrm/dist/
H A Dxf86drm.h952 extern int drmSyncobjWait(int fd, uint32_t *handles, unsigned num_handles,
960 unsigned num_handles,
H A Dxf86drm.c5158 drm_public int drmSyncobjWait(int fd, uint32_t *handles, unsigned num_handles, argument
5168 args.count_handles = num_handles;
5224 unsigned num_handles,
5235 args.count_handles = num_handles;
5223 drmSyncobjTimelineWait(int fd,uint32_t * handles,uint64_t * points,unsigned num_handles,int64_t timeout_nsec,unsigned flags,uint32_t * first_signaled) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/state_trackers/dri/
H A Ddri2.c782 int num_handles, struct winsys_handle *whandle,
824 for (i = num_handles - 1; i >= 0; i--) {
837 templ.format = (num_handles == 2) ?
780 dri2_create_image_from_winsys(__DRIscreen * _screen,int width,int height,enum pipe_format pf,int num_handles,struct winsys_handle * whandle,void * loaderPrivate) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/frontends/dri/
H A Ddri2.c803 int num_handles, struct winsys_handle *whandle,
877 for (i = num_handles - 1; i >= format_planes; i--) {
801 dri2_create_image_from_winsys(__DRIscreen * _screen,int width,int height,const struct dri2_format_mapping * map,int num_handles,struct winsys_handle * whandle,bool is_protected_content,void * loaderPrivate) argument

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