| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_vec4_gs_nir.cpp | 45 const unsigned offset_reg = nir_src_as_uint(instr->src[1]); local
51 instr->const_index[0] + offset_reg,
69 instr->const_index[0] + offset_reg,
|
| brw_vec4_nir.cpp | 503 src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]), local
550 emit_untyped_write(bld, surf_index, offset_reg, val_reg,
563 src_reg offset_reg = retype(get_nir_src_imm(instr->src[1]), local
570 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg,
709 src_reg offset_reg; local
712 offset_reg = brw_imm_ud(load_offset & ~15);
714 offset_reg = src_reg(this, glsl_type::uint_type);
715 emit(MOV(dst_reg(offset_reg),
724 offset_reg, local
731 surf_index, offset_reg, NULL, NULL) local
[all...] |
| brw_vec4_visitor.cpp | 775 src_reg offset_reg,
798 offset_reg.type);
799 pull = MOV(writemask(index_reg, WRITEMASK_X), offset_reg);
815 grf_offset.type = offset_reg.type;
817 pull = MOV(grf_offset, offset_reg);
833 offset_reg);
|
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_vec4_gs_nir.cpp | 46 const unsigned offset_reg = nir_src_as_uint(instr->src[1]); local
54 instr->const_index[0] + offset_reg,
|
| brw_vec4_nir.cpp | 471 src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]), local
518 emit_untyped_write(bld, surf_index, offset_reg, val_reg,
531 src_reg offset_reg = retype(get_nir_src_imm(instr->src[1]), local
538 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg,
649 src_reg offset_reg; local
653 offset_reg = brw_imm_ud(aligned_offset);
674 offset_reg = src_reg(this, glsl_type::uint_type);
675 emit(MOV(dst_reg(offset_reg),
686 offset_reg, local
694 surf_index, offset_reg, NULL, NULL) local
[all...] |
| brw_vec4_visitor.cpp | 734 src_reg offset_reg,
746 grf_offset.type = offset_reg.type;
748 pull = MOV(grf_offset, offset_reg);
764 offset_reg);
|
| /xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/ |
| v3d_nir_lower_io.c | 162 nir_ssa_def *offset_reg = local
182 v3d_nir_store_output(b, state->psiz_vpm_offset, offset_reg, src);
236 offset_reg, nir_channel(b, src, i));
561 nir_ssa_def *offset_reg = local
575 offset_reg, state->pos[i]);
603 offset_reg, pos);
612 v3d_nir_store_output(b, state->zs_vpm_offset, offset_reg, z);
617 offset_reg, rcp_wc);
639 offset_reg, nir_imm_int(b, 0));
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/pp/ |
| codegen.h | 134 unsigned offset_reg : 6; member in struct:__anon1287
281 unsigned offset_reg : 6; member in struct:__anon1297::__anon1298
|
| disasm.c | 349 print_source_scalar(uniform->offset_reg, NULL, false, false, fp);
702 print_source_scalar(temp_write->temp_write.offset_reg,
|
| codegen.c | 174 f->offset_reg = ppir_target_get_src_reg_index(&load->src);
566 f->temp_write.offset_reg = snode->index >> 2;
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/ir/pp/ |
| codegen.h | 133 unsigned offset_reg : 6; member in struct:__anon3753
280 unsigned offset_reg : 6; member in struct:__anon3763::__anon3764
|
| disasm.c | 314 print_source_scalar(uniform->offset_reg, NULL, false, false);
661 print_source_scalar(temp_write->temp_write.offset_reg,
|
| codegen.c | 501 f->temp_write.offset_reg = snode->index >> 2;
|
| /xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/ |
| midgard_emit.c | 667 unsigned offset_reg = SSA_REG_FROM_FIXED(ins->src[3]); local
670 (offset_reg & 1) << 1 | /* select */
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_spill.c | 836 struct ir3_register *offset_reg = local
838 offset_reg->uim_val = spill_slot;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| r600_shader.c | 1872 int offset_reg = ctx->gs_rotated_input[vtx_id / 3]; local
1879 if (offset_reg == ctx->gs_rotated_input[0] && offset_chan == 2)
1930 offset_reg = t2;
1951 offset_reg, offset_chan);
1954 offset_reg = t2;
1962 vtx.src_gpr = offset_reg;
3914 int offset_reg = i / 3; local
3919 if (offset_reg == 0 && offset_chan == 2)
3925 ctx.gs_rotated_input[offset_reg], offset_chan,
3927 offset_reg, offset_chan
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| r600_shader.c | 1784 int offset_reg = ctx->gs_rotated_input[vtx_id / 3]; local
1791 if (offset_reg == ctx->gs_rotated_input[0] && offset_chan == 2)
1842 offset_reg = t2;
1863 offset_reg, offset_chan);
1866 offset_reg = t2;
1874 vtx.src_gpr = offset_reg;
3825 int offset_reg = i / 3; local
3830 if (offset_reg == 0 && offset_chan == 2)
3836 ctx.gs_rotated_input[offset_reg], offset_chan,
3838 offset_reg, offset_chan
[all...] |
