Searched refs:pointers (Results 1 - 25 of 52) sorted by relevance

123

/xsrc/external/mit/brotli/dist/c/enc/
H A Dmemory.c110 SortPointers(m->pointers + NEW_ALLOCATED_OFFSET, m->new_allocated);
111 SortPointers(m->pointers + NEW_FREED_OFFSET, m->new_freed);
113 m->pointers + NEW_ALLOCATED_OFFSET, m->new_allocated,
114 m->pointers + NEW_FREED_OFFSET, m->new_freed);
120 m->pointers + PERM_ALLOCATED_OFFSET, m->perm_allocated,
121 m->pointers + NEW_FREED_OFFSET, m->new_freed);
129 memcpy(m->pointers + PERM_ALLOCATED_OFFSET + m->perm_allocated,
130 m->pointers + NEW_ALLOCATED_OFFSET,
134 SortPointers(m->pointers + PERM_ALLOCATED_OFFSET, m->perm_allocated);
145 m->pointers[NEW_ALLOCATED_OFFSE
[all...]
H A Dmemory.h35 void* pointers[256]; member in struct:MemoryManager
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D17.2.1.rst153 - glsl: stop adding pointers from gl_shader_variable to the cache
154 - glsl: stop adding pointers from glsl_struct_field to the cache
158 - compiler: move pointers to the start of shader_info
159 - glsl: stop adding pointers from shader_info to the cache
160 - glsl: stop adding pointers from bindless structs to the cache
H A D13.0.1.rst61 - radv/pipeline: Don't dereference NULL dynamic state pointers
103 - anv/pipeline: Put actual pointers in anv_shader_bin
H A D10.5.7.rst61 - nv30/draw: avoid leaving stale pointers in draw state
H A D10.6.4.rst101 - radeonsi: rework how shader pointers to descriptors are set
H A D17.2.4.rst81 - i965: Revert absolute mode for constant buffer pointers.
H A D19.0.6.rst102 - freedreno/ir3: dynamic UBO indexing vs 64b pointers
H A D18.1.3.rst113 - radeonsi/gfx9: fix si_get_buffer_from_descriptors for 48-bit pointers
H A D18.3.3.rst71 - vc4: Declare the cpu pointers as being modified in NEON asm.
H A D6.5.1.rst89 pointers will have to be used more often (e.g. use
H A D17.3.4.rst107 - mesa: Fix function pointers initialization in status tracker
156 - st/va: clear pointers for mpeg2 quantiser matrices
H A D20.0.5.rst152 - util/sparse_free_list: manipulate node pointers using atomic
/xsrc/external/mit/MesaLib.old/dist/docs/specs/OLD/
H A DMESA_agp_offset.spec34 This extensions provides a way to convert pointers in an AGP memory
/xsrc/external/mit/MesaLib/dist/docs/_extra/specs/OLD/
H A DMESA_agp_offset.spec34 This extensions provides a way to convert pointers in an AGP memory
/xsrc/external/mit/libdrm/dist/man/
H A DdrmHandleEvent.3.rst26 use the passed-in ``evctx`` structure to call function pointers with the
/xsrc/external/mit/MesaLib/dist/docs/
H A Ddispatch.rst22 function, including the pointers returned by ``glXGetProcAddress``, are
49 Mesa uses two per-thread pointers. The first pointer stores the address
52 dispatch table stores pointers to functions that actually implement
54 thread, these pointers are updated.
93 3.1. Dual dispatch table pointers
244 function names with pointers to those functions. This table is stored in
246 platforms, storing all of those pointers is inefficient. On most
/xsrc/external/mit/MesaLib.old/dist/src/intel/tools/
H A Daubinator_viewer_decoder.cpp225 const uint32_t *pointers = (const uint32_t *) bind_bo.map; local in function:dump_binding_table
227 if (pointers[i] == 0)
230 uint64_t addr = ctx->surface_base + pointers[i];
234 if (pointers[i] % 32 != 0 ||
237 "pointer %u: %012x <not valid>", i, pointers[i]);
242 if (ImGui::TreeNodeEx(&pointers[i], ImGuiTreeNodeFlags_Framed,
243 "pointer %u: %012x", i, pointers[i])) {
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Daubinator_viewer_decoder.cpp225 const uint32_t *pointers = (const uint32_t *) bind_bo.map; local in function:dump_binding_table
227 if (pointers[i] == 0)
230 uint64_t addr = ctx->surface_base + pointers[i];
234 if (pointers[i] % 32 != 0 ||
237 "pointer %u: %012x <not valid>", i, pointers[i]);
242 if (ImGui::TreeNodeEx(&pointers[i], ImGuiTreeNodeFlags_Framed,
243 "pointer %u: %012x", i, pointers[i])) {
/xsrc/external/mit/MesaLib.old/dist/src/intel/common/
H A Dgen_batch_decoder.c268 const uint32_t *pointers = bind_bo.map; local in function:dump_binding_table
270 if (pointers[i] == 0)
273 uint64_t addr = ctx->surface_base + pointers[i];
277 if (pointers[i] % 32 != 0 ||
279 fprintf(ctx->fp, "pointer %u: 0x%08x <not valid>\n", i, pointers[i]);
283 fprintf(ctx->fp, "pointer %u: 0x%08x\n", i, pointers[i]);
/xsrc/external/mit/MesaLib/dist/src/intel/common/
H A Dintel_batch_decoder.c309 const uint32_t *pointers = bind_bo.map; local in function:dump_binding_table
311 if (pointers[i] == 0)
314 uint64_t addr = ctx->surface_base + pointers[i];
318 if (pointers[i] % 32 != 0 ||
320 fprintf(ctx->fp, "pointer %u: 0x%08x <not valid>\n", i, pointers[i]);
324 fprintf(ctx->fp, "pointer %u: 0x%08x\n", i, pointers[i]);
/xsrc/external/mit/xedit/dist/lisp/
H A Dcompile.c1157 BuildTablePointer(void *pointer, void ***pointers, int *num_pointers) argument
1161 if ((i = FindIndex(pointer, *pointers, *num_pointers)) < 0) {
1162 *pointers = LispRealloc(*pointers,
1164 (*pointers)[*num_pointers] = pointer;
1166 qsort(*pointers, *num_pointers, sizeof(void*), compare);
1167 i = FindIndex(pointer, *pointers, *num_pointers);
1577 /* Normal keyword specification, can compare object pointers,
/xsrc/external/mit/libXcursor/dist/include/X11/Xcursor/
H A DXcursor.h.in199 XcursorImage **images; /* array of XcursorImage pointers */
226 XcursorComment **comments; /* array of XcursorComment pointers */
/xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/drivers/freedreno/
H A Dir3-notes.rst107 Represents a machine instruction or meta_ instruction. Has pointers
220 The frontend sets up the SSA ptrs from ``sam`` source register to the ``fanin`` meta instruction, which in turn points to the instructions producing the ``coord.x`` and ``coord.y`` values. And the grouping_ pass sets up the ``left`` and ``right`` neighbor pointers to the ``fanin``\'s sources, used later by the `register assignment`_ pass to assign blocks of scalar registers.
404 In the grouping pass, instructions which need to be grouped (for ``fanin``\s, etc) have their ``left`` / ``right`` neighbor pointers setup. In cases where there is a conflict (ie. one instruction cannot have two unique left or right neighbors), an additional ``mov`` instruction is inserted. This ensures that there is some possible valid `register assignment`_ at the later stages.
/xsrc/external/mit/MesaLib/dist/docs/drivers/freedreno/
H A Dir3-notes.rst107 Represents a machine instruction or meta_ instruction. Has pointers
220 The frontend sets up the SSA ptrs from ``sam`` source register to the ``collect`` meta instruction, which in turn points to the instructions producing the ``coord.x`` and ``coord.y`` values. And the grouping_ pass sets up the ``left`` and ``right`` neighbor pointers to the ``collect``\'s sources, used later by the `register assignment`_ pass to assign blocks of scalar registers.
375 In the grouping pass, instructions which need to be grouped (for ``collect``\s, etc) have their ``left`` / ``right`` neighbor pointers setup. In cases where there is a conflict (i.e. one instruction cannot have two unique left or right neighbors), an additional ``mov`` instruction is inserted. This ensures that there is some possible valid `register assignment`_ at the later stages.

Completed in 25 milliseconds

123