Searched refs:pseudo (Results 1 - 25 of 222) sorted by relevance

123456789

/xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/
H A Dtest_regalloc.cpp47 Builder::Result tmp = bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]);
69 Temp hi = bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]).def(1).getTemp();
76 bld.pseudo(aco_opcode::p_create_vector, bld.def(v1), lo, hi);
89 Temp op1 = bld.pseudo(aco_opcode::p_unit_test, bld.def(s2));
95 bld.pseudo(aco_opcode::p_unit_test, op, op1);
109 bld.pseudo(aco_opcode::p_unit_test, op);
112 bld.pseudo(aco_opcode::p_unit_test, inputs[0]);
126 bld.pseudo(aco_opcode::p_unit_test, op);
129 bld.pseudo(aco_opcode::p_unit_test, inputs[2]);
143 bld.pseudo(aco_opcod
[all...]
H A Dtest_to_hw_instr.cpp54 bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
55 bld.pseudo(aco_opcode::p_parallelcopy,
63 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
64 bld.pseudo(aco_opcode::p_create_vector,
73 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
74 bld.pseudo(aco_opcode::p_create_vector,
84 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
85 bld.pseudo(aco_opcode::p_create_vector,
98 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
99 bld.pseudo(aco_opcod
196 Instruction* pseudo = bld.pseudo(aco_opcode::p_create_vector, variable in typeref:typename:Instruction *
[all...]
H A Dtest_hard_clause.cpp106 bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
114 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
122 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
130 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
138 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
145 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u));
152 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6u));
159 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(7u));
172 bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
179 bld.pseudo(aco_opcod
[all...]
H A Dtest_insert_nops.cpp60 bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
69 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
77 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
86 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
95 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
106 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u));
125 bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
134 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
144 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
157 bld.pseudo(aco_opcod
[all...]
H A Dtest_sdwa.cpp171 Temp bfe_byte0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u),
176 Temp bfe_byte1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u), Operand::c32(8u),
181 Temp bfe_byte2_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(2u), Operand::c32(8u),
186 Temp bfe_byte3_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(3u), Operand::c32(8u),
191 Temp bfe_word0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(16u),
196 Temp bfe_word1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u),
201 Temp bfi_byte0_b = bld.pseudo(ins, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u));
206 bld.pseudo(ins, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(16u));
218 bld.pseudo(ins, bld.def(v1), inputs[1], Operand::c32(1u), Operand::c32(8u));
227 Temp bfe_byte0_b = bld.pseudo(ex
[all...]
H A Dhelpers.cpp245 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), tmp);
247 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i));
252 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), res);
257 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), op);
262 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), op0, op1);
H A Dtest_optimizer.cpp180 bld.pseudo(aco_opcode::p_unit_test, tmp);
641 bld.pseudo(aco_opcode::p_extract_vector, bld.def(v2b), inputs[1], Operand::zero());
/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A Daco_instruction_selection.cpp119 Builder(NULL, b).pseudo(aco_opcode::p_logical_start);
125 Builder(NULL, b).pseudo(aco_opcode::p_logical_end);
153 bld.pseudo(aco_opcode::p_split_vector, bld.def(rc), bld.def(rc), mask);
185 bld.pseudo(aco_opcode::p_wqm, Definition(dst), src);
203 return bld.pseudo(aco_opcode::p_bpermute, bld.def(v1), bld.def(bld.lm), bld.def(bld.lm, vcc),
211 bld.pseudo(aco_opcode::p_split_vector, bld.def(s1), bld.def(s1), index_is_lo);
214 Operand same_half = bld.pseudo(aco_opcode::p_create_vector, bld.def(s2),
227 return bld.pseudo(aco_opcode::p_bpermute, bld.def(v1), bld.def(s2), bld.def(s1, scc),
334 bld.pseudo(aco_opcode::p_extract_vector, Definition(dst), src, Operand::c32(idx));
416 bld.pseudo(aco_opcod
[all...]
H A Daco_insert_exec_mask.cpp355 exec_mask = bld.pseudo(aco_opcode::p_parallelcopy, bld.def(bld.lm), Operand(exec, bld.lm));
369 ctx.info[idx].exec.back().first = bld.pseudo(
387 ctx.info[idx].exec.back().first = bld.pseudo(
504 bld.pseudo(aco_opcode::p_parallelcopy, Definition(exec, bld.lm),
604 ctx.info[idx].exec.back().first = bld.pseudo(
639 Temp phi = bld.pseudo(aco_opcode::p_linear_phi,
674 bld.pseudo(aco_opcode::p_parallelcopy, Definition(exec, bld.lm), restore);
949 bld.pseudo(aco_opcode::p_exit_early_if, bld.scc(andn2->definitions[1].getTemp()));
974 ctx.info[idx].exec.back().first = bld.pseudo(
1013 bld.pseudo(aco_opcod
[all...]
H A DREADME.md66 This pass is responsible for making sure that register allocation is correct for reductions, by adding pseudo instructions that utilize linear VGPRs.
97 Most pseudo instructions are lowered to actual machine instructions.
H A Daco_lower_phis.cpp329 insert_before_logical_end(pred, bld.pseudo(aco_opcode::p_extract_vector,
H A Daco_ir.h1021 Pseudo_instruction& pseudo() noexcept function in struct:aco::Instruction
1026 const Pseudo_instruction& pseudo() const noexcept function in struct:aco::Instruction
H A Daco_register_allocation.cpp1814 instr->pseudo().tmp_in_scc = reg_file[scc];
1830 instr->pseudo().scratch_sgpr = PhysReg{(unsigned)reg};
/xsrc/external/mit/freetype/dist/builds/compiler/
H A Dansi-cc.mk2 # FreeType 2 generic pseudo ANSI compiler
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D10.2.9.rst53 - nv50/ir: avoid deleting pseudo instructions too early
H A D10.3.1.rst77 - nv50/ir: avoid deleting pseudo instructions too early
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target.h207 unsigned int pseudo : 1; member in struct:nv50_ir::Target::OpInfo
H A Dnv50_ir_target_nv50.cpp160 opInfo[i].pseudo = (i < OP_MOV);
161 opInfo[i].predicate = !opInfo[i].pseudo;
H A Dnv50_ir_target_nvc0.cpp244 opInfo[i].pseudo = (i < OP_MOV);
245 opInfo[i].predicate = !opInfo[i].pseudo;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target.h209 unsigned int pseudo : 1; member in struct:nv50_ir::Target::OpInfo
H A Dnv50_ir_target_nv50.cpp160 opInfo[i].pseudo = (i < OP_MOV);
161 opInfo[i].predicate = !opInfo[i].pseudo;
H A Dnv50_ir_target_gv100.cpp71 opInfo[i].pseudo = (i < OP_MOV);
72 opInfo[i].predicate = !opInfo[i].pseudo;
H A Dnv50_ir_target_nvc0.cpp244 opInfo[i].pseudo = (i < OP_MOV);
245 opInfo[i].predicate = !opInfo[i].pseudo;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/
H A Dnotes.markdown87 All values (except some pseudo values like the exec\_mask or predicate
321 gpr as in the original instruction, other two are pseudo-operands
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sb/
H A Dnotes.markdown87 All values (except some pseudo values like the exec\_mask or predicate
321 gpr as in the original instruction, other two are pseudo-operands

Completed in 47 milliseconds

123456789