Searched refs:reg_class (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/
H A Detnaviv_compiler_nir.h244 enum reg_class { enum
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/
H A Dr300_reg.h2947 #define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class, saturate) \
2953 | ((reg_class & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT)) \
2957 #define PVS_SRC_OPERAND(in_reg_index, comp_x, comp_y, comp_z, comp_w, reg_class, negate) \
2964 | ((reg_class & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT))
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/
H A Dr300_reg.h2947 #define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class, saturate) \
2953 | ((reg_class & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT)) \
2957 #define PVS_SRC_OPERAND(in_reg_index, comp_x, comp_y, comp_z, comp_w, reg_class, negate) \
2964 | ((reg_class & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT))
/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A Daco_ir.h407 Temp() noexcept : id_(0), reg_class(0) {}
408 constexpr Temp(uint32_t id, RegClass cls) noexcept : id_(id), reg_class(uint8_t(cls)) {}
411 constexpr RegClass regClass() const noexcept { return (RegClass::RC)reg_class; }
424 uint32_t reg_class : 8; member in struct:aco::Temp

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