| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_nir_lower_tess_io.cpp | 74 r600_tcs_base_address(nir_builder *b, nir_ssa_def *param_base, nir_ssa_def *rel_patch_id) argument 77 rel_patch_id, 307 auto rel_patch_id = r600_load_rel_patch_id(b); local in function:r600_lower_tess_io_impl 328 emil_lsd_in_addr(b, load_in_param_base, rel_patch_id, op) : 329 emil_lsd_out_addr(b, load_in_param_base, rel_patch_id, op, nir_var_shader_in, 0); 334 nir_ssa_def *addr = emil_lsd_out_addr(b, load_out_param_base, rel_patch_id, op, nir_var_shader_out, 1); 340 nir_ssa_def *addr = emil_lsd_out_addr(b, load_out_param_base, rel_patch_id, op, nir_var_shader_out, 0); 346 r600_tcs_base_address(b, load_out_param_base, rel_patch_id): 349 rel_patch_id, NULL, NULL); 356 nir_ssa_def *addr = r600_tcs_base_address(b, load_out_param_base, rel_patch_id); 377 auto rel_patch_id = r600_load_rel_patch_id(b); local in function:r600_lower_tess_io_impl 469 auto rel_patch_id = r600_load_rel_patch_id(b); local in function:r600_append_tcs_TF_emission [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_shader_llvm_tess.c | 115 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_in_current_patch_offset 117 return LLVMBuildMul(ctx->ac.builder, patch_stride, rel_patch_id, ""); 124 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_offset 126 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, patch0_offset); 133 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_data_offset 135 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, patch0_patch_data_offset); 216 LLVMValueRef rel_patch_id, LLVMValueRef vertex_index, 229 base_addr = ac_build_imad(&ctx->ac, rel_patch_id, vertices_per_patch, vertex_index); 232 base_addr = rel_patch_id; 670 static void si_write_tess_factors(struct si_shader_context *ctx, LLVMValueRef rel_patch_id, argument 215 get_tcs_tes_buffer_address(struct si_shader_context * ctx,LLVMValueRef rel_patch_id,LLVMValueRef vertex_index,LLVMValueRef param_index) argument 831 LLVMValueRef rel_patch_id, invocation_id, tf_lds_offset; local in function:si_llvm_emit_tcs_epilogue 1044 struct ac_arg rel_patch_id; /* patch index within the wave (REL_PATCH_ID) */ local in function:si_llvm_build_tcs_epilog [all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| H A D | ac_nir_lower_tess_io_to_mem.c | 79 * TCS per-vertex inputs for patch 2 <─── hs_per_vertex_input_lds_offset (rel_patch_id = 2) 85 * TCS per-vertex outputs for patch 2 <─── hs_output_lds_offset (rel_patch_id = 2, per-vertex) 86 * TCS per-patch outputs for patch 2 <─── hs_output_lds_offset (rel_patch_id = 2, per-patch) 99 * attr 0 of patch 1 vertex 2 <─── hs_per_vertex_output_vmem_offset (attribute slot = 0, rel_patch_id = 1, vertex index = 1) 112 * per-patch attr 0 of patch 2 <─── hs_per_patch_output_vmem_offset (attribute slot = 0, rel_patch_id = 2) 273 nir_ssa_def *rel_patch_id = nir_build_load_tess_rel_patch_id_amd(b); local in function:hs_per_vertex_input_lds_offset 276 nir_ssa_def *tcs_in_current_patch_offset = nir_imul(b, rel_patch_id, tcs_in_patch_stride); 308 nir_ssa_def *rel_patch_id = nir_build_load_tess_rel_patch_id_amd(b); local in function:hs_output_lds_offset 309 nir_ssa_def *patch_offset = nir_imul_imm(b, rel_patch_id, output_patch_stride); 337 nir_ssa_def *rel_patch_id local in function:hs_per_vertex_output_vmem_offset 367 nir_ssa_def *rel_patch_id = nir_build_load_tess_rel_patch_id_amd(b); local in function:hs_per_patch_output_vmem_offset 529 nir_ssa_def *rel_patch_id = nir_build_load_tess_rel_patch_id_amd(b); local in function:hs_emit_write_tess_factors [all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3_context.h | 101 struct ir3_instruction *rel_patch_id; member in struct:ir3_context
|
| H A D | ir3_compiler_nir.c | 1704 dst[0] = ctx->rel_patch_id; 3755 ctx->rel_patch_id = 3769 ctx->rel_patch_id = 3779 ctx->rel_patch_id = 4026 if (so->type == MESA_SHADER_VERTEX && ctx->rel_patch_id) 4033 if (so->type == MESA_SHADER_VERTEX && ctx->rel_patch_id) { 4036 struct ir3_instruction *out = ir3_collect(ctx->block, ctx->rel_patch_id); 4241 ctx->rel_patch_id->dsts[0]->num = regid(0, 1);
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_nir_to_llvm.c | 405 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_in_current_patch_offset 407 return LLVMBuildMul(ctx->ac.builder, patch_stride, rel_patch_id, ""); 415 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_offset 417 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, 427 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_data_offset 429 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, 1391 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_tes_buffer_address 1396 base_addr = ac_build_imad(&ctx->ac, rel_patch_id, 1399 base_addr = rel_patch_id; 3194 LLVMValueRef rel_patch_id local in function:write_tess_factors [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_shader.c | 371 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_in_current_patch_offset 373 return LLVMBuildMul(ctx->ac.builder, patch_stride, rel_patch_id, ""); 381 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_offset 383 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, patch0_offset); 392 LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); local in function:get_tcs_out_current_patch_data_offset 394 return ac_build_imad(&ctx->ac, patch_stride, rel_patch_id, patch0_patch_data_offset); 948 LLVMValueRef rel_patch_id, 962 base_addr = ac_build_imad(&ctx->ac, rel_patch_id, 966 base_addr = rel_patch_id; 3062 LLVMValueRef rel_patch_id, 947 get_tcs_tes_buffer_address(struct si_shader_context * ctx,LLVMValueRef rel_patch_id,LLVMValueRef vertex_index,LLVMValueRef param_index) argument 3061 si_write_tess_factors(struct lp_build_tgsi_context * bld_base,LLVMValueRef rel_patch_id,LLVMValueRef invocation_id,LLVMValueRef tcs_out_current_patch_data_offset,LLVMValueRef invoc0_tf_outer[4],LLVMValueRef invoc0_tf_inner[2]) argument 3275 LLVMValueRef rel_patch_id, invocation_id, tf_lds_offset; local in function:si_llvm_emit_tcs_epilogue [all...] |