| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_sanity.c | 613 static struct reg scalars[512+1]; variable in typeref:struct:reg[] 629 for (i = 0, tmp = scalar_names ; i < ARRAY_SIZE(scalars) ; i++) { 631 scalars[i].idx = i; 632 scalars[i].closest = tmp; 633 scalars[i].flags = ISFLOAT; 644 scalars[ARRAY_SIZE(scalars)-1].idx = -1; 792 for (i = 0 ; i < ARRAY_SIZE(scalars) ; i++) 793 print_reg( &scalars[i] ); 841 int sz = header.scalars [all...] |
| H A D | r200_state_init.c | 200 h.scalars.cmd_type = RADEON_CMD_SCALARS; 201 h.scalars.offset = offset; 202 h.scalars.stride = stride; 203 h.scalars.count = count; 211 h.scalars.cmd_type = RADEON_CMD_SCALARS2; 212 h.scalars.offset = offset - 0x100; 213 h.scalars.stride = stride; 214 h.scalars.count = count; 312 OUT_BATCH((h.scalars.offset) | (h.scalars [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_sanity.c | 335 static struct reg scalars[512+1]; variable in typeref:struct:reg[] 351 for (i = 0, tmp = scalar_names ; i < ARRAY_SIZE(scalars) ; i++) { 353 scalars[i].idx = i; 354 scalars[i].closest = tmp; 355 scalars[i].flags = ISFLOAT; 366 scalars[ARRAY_SIZE(scalars)-1].idx = -1; 514 for (i = 0 ; i < ARRAY_SIZE(scalars) ; i++) 515 print_reg( &scalars[i] ); 563 int sz = header.scalars [all...] |
| H A D | radeon_state_init.c | 182 h.scalars.cmd_type = RADEON_CMD_SCALARS; 183 h.scalars.offset = offset; 184 h.scalars.stride = stride; 185 h.scalars.count = count; 256 OUT_BATCH((h.scalars.offset) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 257 OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 258 OUT_BATCH_TABLE((data), h.scalars.count); \
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_sanity.c | 613 static struct reg scalars[512+1]; variable in typeref:struct:reg[] 629 for (i = 0, tmp = scalar_names ; i < ARRAY_SIZE(scalars) ; i++) { 631 scalars[i].idx = i; 632 scalars[i].closest = tmp; 633 scalars[i].flags = ISFLOAT; 644 scalars[ARRAY_SIZE(scalars)-1].idx = -1; 792 for (i = 0 ; i < ARRAY_SIZE(scalars) ; i++) 793 print_reg( &scalars[i] ); 841 int sz = header.scalars [all...] |
| H A D | r200_state_init.c | 200 h.scalars.cmd_type = RADEON_CMD_SCALARS; 201 h.scalars.offset = offset; 202 h.scalars.stride = stride; 203 h.scalars.count = count; 211 h.scalars.cmd_type = RADEON_CMD_SCALARS2; 212 h.scalars.offset = offset - 0x100; 213 h.scalars.stride = stride; 214 h.scalars.count = count; 312 OUT_BATCH((h.scalars.offset) | (h.scalars [all...] |
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_sanity.c | 335 static struct reg scalars[512+1]; variable in typeref:struct:reg[] 351 for (i = 0, tmp = scalar_names ; i < ARRAY_SIZE(scalars) ; i++) { 353 scalars[i].idx = i; 354 scalars[i].closest = tmp; 355 scalars[i].flags = ISFLOAT; 366 scalars[ARRAY_SIZE(scalars)-1].idx = -1; 514 for (i = 0 ; i < ARRAY_SIZE(scalars) ; i++) 515 print_reg( &scalars[i] ); 563 int sz = header.scalars [all...] |
| H A D | radeon_state_init.c | 181 h.scalars.cmd_type = RADEON_CMD_SCALARS; 182 h.scalars.offset = offset; 183 h.scalars.stride = stride; 184 h.scalars.count = count; 255 OUT_BATCH((h.scalars.offset) | (h.scalars.stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT)); \ 256 OUT_BATCH(CP_PACKET0_ONE(R200_SE_TCL_SCALAR_DATA_REG, h.scalars.count - 1)); \ 257 OUT_BATCH_TABLE((data), h.scalars.count); \
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| /xsrc/external/mit/MesaLib/dist/src/asahi/lib/ |
| H A D | agx_device.c | 414 uint64_t scalars[2] = { local in function:agx_create_command_queue 421 scalars, 2, NULL, NULL); 427 uint64_t scalars[2] = { local in function:agx_create_command_queue 434 scalars, 2, NULL, NULL);
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| /xsrc/external/mit/libdrm/dist/include/drm/ |
| H A D | radeon_drm.h | 198 } scalars; member in union:__anonc5db6698010a
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_drm.h | 192 } scalars; member in union:__anon2672992b010a
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| /xsrc/external/mit/MesaLib/dist/src/amd/llvm/ |
| H A D | ac_llvm_build.c | 2570 LLVMValueRef *scalars = alloca(vec_size * sizeof(LLVMValueRef)); local in function:ac_const_uint_vec 2573 scalars[i] = scalar; 2574 return LLVMConstVector(scalars, vec_size);
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 7.10.rst | 1127 - i965: Fix new FS handling of builtin uniforms with packed scalars in 1853 - gallivm: Pass texture coords derivates as scalars.
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| H A D | 20.1.0.rst | 546 - pan/bi: Lower combines to rewrites for scalars 3703 - freedreno/ir3/ra: pick higher numbered scalars in first pass
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| H A D | 21.2.0.rst | 488 - pan/bi: Don't swizzle scalars 497 - pan/bi: Change swizzled scalars to identity
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| H A D | 19.3.0.rst | 1285 - lima/ppir: lower selects to scalars
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| H A D | 21.0.0.rst | 428 - pan/bi: Allow passing thorugh 8-bit scalars
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| /xsrc/external/mit/MesaLib/dist/ |
| H A D | .pick_status.json | 25996 "description": "nouveau/nir: Use natural alignment for scalars", [all...] |