| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_disasm.c | 61 uint32_t src1_reg : 9; member in struct:instr
561 .reg = instr->src1_reg,
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 199 emit_int64_dpp_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, argument
207 Operand src1[] = {Operand(src1_reg, v1), Operand(PhysReg{src1_reg + 1}, v1)};
208 Operand src1_64 = Operand(src1_reg, v2);
299 emit_int64_op(lower_context* ctx, PhysReg dst_reg, PhysReg src0_reg, PhysReg src1_reg, PhysReg vtmp, argument
306 Operand src1[] = {Operand(src1_reg, v1), Operand(PhysReg{src1_reg + 1}, v1)};
308 Operand src1_64 = Operand(src1_reg, v2);
356 if (src1_reg == dst_reg) {
358 std::swap(src0_reg, src1_reg);
386 emit_dpp_op(lower_context * ctx,PhysReg dst_reg,PhysReg src0_reg,PhysReg src1_reg,PhysReg vtmp,ReduceOp op,unsigned size,unsigned dpp_ctrl,unsigned row_mask,unsigned bank_mask,bool bound_ctrl,Operand * identity=NULL) argument
427 emit_op(lower_context * ctx,PhysReg dst_reg,PhysReg src0_reg,PhysReg src1_reg,PhysReg vtmp,ReduceOp op,unsigned size) argument
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/ |
| H A D | etnaviv_disasm.c | 64 uint32_t src1_reg : 9; member in struct:instr
568 .reg = instr->src1_reg,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/midgard/ |
| H A D | midgard.h | 245 unsigned src1_reg : 5; member in struct:__anon43e15d220c08
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| H A D | disassemble.c | 416 print_vector_src(alu_field->src1, out_high, mode, reg_info->src1_reg, is_int);
494 print_scalar_src(alu_field->src1, reg_info->src1_reg);
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| H A D | midgard_compile.c | 2132 ins->registers.src1_reg = dealias_register(ctx, g, args.src0, ctx->temp_count);
2714 if (qins->registers.src1_reg < 16)
2715 register_dep_mask |= (1 << qins->registers.src1_reg);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a2xx/ |
| H A D | instr-a2xx.h | 160 uint8_t src1_reg : 6; member in struct:PACKED::__anonbf997042030a::__anonbf9970420408
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| H A D | disasm-a2xx.c | 245 print_srcreg(alu->src1_reg, alu->src1_sel, alu->src1_swiz,
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir2/ |
| H A D | instr-a2xx.h | 159 uint8_t src1_reg : 6; member in struct:PACKED::__anond7463837030a::__anond74638370408
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| H A D | disasm-a2xx.c | 261 print_srcreg(alu->src1_reg, alu->src1_sel, alu->src1_swiz,
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| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i915_structs.h | 547 unsigned src1_reg:5; member in struct:arithmetic_inst::__anonea2082432208
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| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i915_structs.h | 547 unsigned src1_reg:5; member in struct:arithmetic_inst::__anona54546772208
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/ |
| H A D | disassemble.c | 872 if (reg_info->src1_reg == REGISTER_CONSTANT)
876 print_vector_src(ctx, fp, alu_field->src1, mode, reg_info->src1_reg,
967 if (reg_info->src1_reg == REGISTER_CONSTANT)
970 print_scalar_src(ctx, fp, is_int, alu_field->src1, reg_info->src1_reg);
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| H A D | midgard.h | 351 unsigned src1_reg : 5; member in struct:__anon60a087ed0f08
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| H A D | midgard_emit.c | 870 .src1_reg = (ins->src[0] == ~0 ?
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/ |
| H A D | i915_structs.h | 583 unsigned src1_reg : 5; member in struct:arithmetic_inst::__anon8e8c39662308
|