Searched refs:src_mask (Results 1 - 22 of 22) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/ir/pp/
H A Dnir.c176 unsigned src_mask; local in function:ppir_emit_alu
179 src_mask = 0b0011;
182 src_mask = 0b0111;
185 src_mask = 0b1111;
188 src_mask = pd->write_mask;
199 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/pp/
H A Dliveness.c32 uint8_t *dest_mask, uint8_t *src_mask)
38 dest_mask[i] |= src_mask[i];
30 ppir_liveness_propagate(ppir_compiler * comp,BITSET_WORD * dest_set,BITSET_WORD * src_set,uint8_t * dest_mask,uint8_t * src_mask) argument
H A Dnir.c180 unsigned src_mask; local in function:ppir_emit_alu
183 src_mask = 0b0111;
186 src_mask = 0b1111;
189 src_mask = pd->write_mask;
200 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/program/
H A Dprog_optimize.c121 get_dst_mask_for_mov(const struct prog_instruction *mov, GLuint src_mask) argument
134 if ((src_mask & (1 << src_comp)) == 0)
487 GLuint dst_mask, src_mask; local in function:_mesa_remove_extra_move_use
495 src_mask = get_src_arg_mask(mov, 0, NO_MASK);
544 src_mask = get_src_arg_mask(mov, 0, dst_mask);
551 src_mask &= ~inst2->DstReg.WriteMask;
552 dst_mask &= get_dst_mask_for_mov(mov, src_mask);
/xsrc/external/mit/MesaLib/dist/src/mesa/program/
H A Dprog_optimize.c121 get_dst_mask_for_mov(const struct prog_instruction *mov, GLuint src_mask) argument
134 if ((src_mask & (1 << src_comp)) == 0)
487 GLuint dst_mask, src_mask; local in function:_mesa_remove_extra_move_use
495 src_mask = get_src_arg_mask(mov, 0, NO_MASK);
544 src_mask = get_src_arg_mask(mov, 0, dst_mask);
551 src_mask &= ~inst2->DstReg.WriteMask;
552 dst_mask &= get_dst_mask_for_mov(mov, src_mask);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/util/
H A Du_surface.c598 uint64_t src_mask; local in function:util_clear_depth_stencil_texture
601 src_mask = 0x00000000ffffffffull;
603 src_mask = 0x000000ff00000000ull;
608 uint64_t tmp = *row & ~src_mask;
609 *row++ = tmp | (zstencil & src_mask);
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/util/
H A Du_surface.c530 uint64_t src_mask; local in function:util_fill_zs_rect
533 src_mask = 0x00000000ffffffffull;
535 src_mask = 0x000000ff00000000ull;
540 uint64_t tmp = *row & ~src_mask;
541 *row++ = tmp | (zstencil & src_mask);
/xsrc/external/mit/xorg-server.old/dist/hw/dmx/glxProxy/
H A Dglxsingle.c917 unsigned char src_mask = 0x80; local in function:__glXDisp_ReadPixels
923 if ( *src & src_mask ) {
936 if (src_mask > 1) src_mask >>= 1;
938 src_mask = 0x80;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c1118 * dst = iround(src * dst_mask / src_mask)
1122 * dst = src * (2*dst_mask + sign(src)*src_mask) / (2*src_mask)
1126 * src_mask = (1 << src_bits) - 1
1192 * Approximate the division by src_mask with a src_bits shift.
1737 LLVMValueRef src_mask[4 * 4]; local in function:generate_unswizzled_blend
1924 src_mask[i*2 + 0] = lp_build_extract_range(gallivm, fs_mask[i],
1926 src_mask[i*2 + 1] = lp_build_extract_range(gallivm, fs_mask[i],
1933 src_mask[i] = fs_mask[i];
2135 lp_bld_quad_twiddle(gallivm, mask_type, &src_mask[
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c1688 * dst = iround(src * dst_mask / src_mask)
1692 * dst = src * (2*dst_mask + sign(src)*src_mask) / (2*src_mask)
1696 * src_mask = (1 << src_bits) - 1
1771 * Approximate the division by src_mask with a src_bits shift.
2321 LLVMValueRef src_mask[4 * 4]; local in function:generate_unswizzled_blend
2508 src_mask[i*2 + 0] = lp_build_extract_range(gallivm, fs_mask[i],
2510 src_mask[i*2 + 1] = lp_build_extract_range(gallivm, fs_mask[i],
2517 src_mask[i] = fs_mask[i];
2719 lp_bld_quad_twiddle(gallivm, mask_type, &src_mask[
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/xsrc/external/mit/MesaLib/dist/src/compiler/nir/
H A Dnir_format_convert.h57 uint32_t src_mask, int src_left_shift)
59 return nir_ior(b, nir_mask_shift(b, src, src_mask, src_left_shift), dst);
56 nir_mask_shift_or(struct nir_builder * b,nir_ssa_def * dst,nir_ssa_def * src,uint32_t src_mask,int src_left_shift) argument
/xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/
H A Dnir_format_convert.h48 uint32_t src_mask, int src_left_shift)
50 return nir_ior(b, nir_mask_shift(b, src, src_mask, src_left_shift), dst);
47 nir_mask_shift_or(struct nir_builder * b,nir_ssa_def * dst,nir_ssa_def * src,uint32_t src_mask,int src_left_shift) argument
H A Dnir_builder.h812 nir_component_mask_t src_mask = local in function:nir_bitcast_vector
814 dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_blorp.c297 VkImageAspectFlags src_mask = pRegions[r].srcSubresource.aspectMask, local in function:anv_CmdCopyImage
300 assert(anv_image_aspects_compatible(src_mask, dst_mask));
302 if (util_bitcount(src_mask) > 1) {
304 anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) {
329 get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, src_mask,
/xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/
H A Ddisassemble.c663 uint8_t src_mask, bool is_int,
672 print_vec_swizzle(fp, src->swizzle, src->expand_mode, mode, src_mask);
867 uint8_t src_mask = local in function:print_vector_field
877 shrink_mode, src_mask, is_int, argmod);
890 shrink_mode, src_mask, is_int, argmod);
660 print_vector_src(disassemble_context * ctx,FILE * fp,unsigned src_binary,midgard_reg_mode mode,unsigned reg,midgard_shrink_mode shrink_mode,uint8_t src_mask,bool is_int,midgard_special_arg_mod arg_mod) argument
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_blorp.c353 VkImageAspectFlags src_mask = region->srcSubresource.aspectMask, local in function:copy_image
356 assert(anv_image_aspects_compatible(src_mask, dst_mask));
358 if (util_bitcount(src_mask) > 1) {
359 anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) {
400 get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, src_mask,
/xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/
H A Dtu_cmd_buffer.c2646 enum tu_cmd_access_mask src_mask,
2651 if (src_mask & TU_ACCESS_SYSMEM_WRITE) {
2655 if (src_mask & TU_ACCESS_CP_WRITE) {
2664 if (src_mask & TU_ACCESS_##domain##_WRITE) { \
2676 if (src_mask & TU_ACCESS_##domain##_INCOHERENT_WRITE) { \
2645 tu_flush_for_access(struct tu_cache_state * cache,enum tu_cmd_access_mask src_mask,enum tu_cmd_access_mask dst_mask) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nvc0/
H A Dnvc0_query_hw_sm.c600 uint32_t src_mask; /* mask for signal selection (only for NVC0:NVE4) */ member in struct:nvc0_hw_sm_counter_cfg
2445 mask_sel &= cfg->ctr[i].src_mask;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_lowering.c113 const struct tgsi_full_src_register *src, unsigned src_mask)
121 if (src_mask & (1 << i))
112 aliases(const struct tgsi_full_dst_register * dst,unsigned dst_mask,const struct tgsi_full_src_register * src,unsigned src_mask) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nvc0/
H A Dnvc0_query_hw_sm.c600 uint32_t src_mask; /* mask for signal selection (only for NVC0:NVE4) */ member in struct:nvc0_hw_sm_counter_cfg
2449 mask_sel &= cfg->ctr[i].src_mask;
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_lowering.c114 const struct tgsi_full_src_register *src, unsigned src_mask)
122 if (src_mask & (1 << i))
113 aliases(const struct tgsi_full_dst_register * dst,unsigned dst_mask,const struct tgsi_full_src_register * src,unsigned src_mask) argument
/xsrc/external/mit/pixman/dist/pixman/
H A Dpixman-vmx.c211 #define DECLARE_SRC_MASK_VAR vector unsigned char src_mask

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