Searched refs:surface_table (Results 1 - 17 of 17) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_render.h399 uint16_t surface_table; member in struct:gen4_render_state
419 uint16_t surface_table; member in struct:gen5_render_state
474 uint16_t surface_table; member in struct:gen6_render_state
531 uint16_t surface_table; member in struct:gen7_render_state
590 uint16_t surface_table; member in struct:gen8_render_state
650 uint16_t surface_table; member in struct:gen9_render_state
H A Dgen7_render.c944 if (sna->render_state.gen7.surface_table == offset)
952 sna->render_state.gen7.surface_table = offset;
1159 need_stall = sna->render_state.gen7.surface_table != wm_binding_table;
1579 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table &&
1581 sna->kgem.batch[sna->render_state.gen7.surface_table+2] == binding_table[2])) {
1583 offset = sna->render_state.gen7.surface_table;
1586 if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0])
2942 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
2944 offset = sna->render_state.gen7.surface_table;
2947 if (sna->kgem.batch[sna->render_state.gen7.surface_table]
[all...]
H A Dgen8_render.c1048 if (sna->render_state.gen8.surface_table == offset)
1056 sna->render_state.gen8.surface_table = offset;
1260 need_stall = sna->render_state.gen8.surface_table != wm_binding_table;
1682 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table &&
1684 sna->kgem.batch[sna->render_state.gen8.surface_table+2] == binding_table[2])) {
1686 offset = sna->render_state.gen8.surface_table;
1689 if (sna->kgem.batch[sna->render_state.gen8.surface_table] == binding_table[0])
2781 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table) {
2783 offset = sna->render_state.gen8.surface_table;
2786 if (sna->kgem.batch[sna->render_state.gen8.surface_table]
[all...]
H A Dgen9_render.c1113 if (sna->render_state.gen9.surface_table == offset)
1121 sna->render_state.gen9.surface_table = offset;
1338 need_stall = sna->render_state.gen9.surface_table != wm_binding_table;
1758 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen9.surface_table) == *(uint64_t*)binding_table &&
1760 sna->kgem.batch[sna->render_state.gen9.surface_table+2] == binding_table[2])) {
1762 offset = sna->render_state.gen9.surface_table;
1765 if (sna->kgem.batch[sna->render_state.gen9.surface_table] == binding_table[0])
2860 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen9.surface_table) == *(uint64_t*)binding_table) {
2862 offset = sna->render_state.gen9.surface_table;
2865 if (sna->kgem.batch[sna->render_state.gen9.surface_table]
[all...]
H A Dgen4_render.c924 if (sna->render_state.gen4.surface_table == offset)
927 sna->render_state.gen4.surface_table = offset;
1179 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table &&
1181 sna->kgem.batch[sna->render_state.gen4.surface_table+2] == binding_table[2])) {
1183 offset = sna->render_state.gen4.surface_table;
1186 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0])
1429 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0])
2398 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table) {
2400 offset = sna->render_state.gen4.surface_table;
2403 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table]
[all...]
H A Dgen6_render.c740 if (sna->render_state.gen6.surface_table == offset)
752 sna->render_state.gen6.surface_table = offset;
939 need_stall = sna->render_state.gen6.surface_table != wm_binding_table;
1377 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table &&
1379 sna->kgem.batch[sna->render_state.gen6.surface_table+2] == binding_table[2])) {
1381 offset = sna->render_state.gen6.surface_table;
2731 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) {
2733 offset = sna->render_state.gen6.surface_table;
3148 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) {
3151 offset = sna->render_state.gen6.surface_table;
[all...]
H A Dgen5_render.c852 sna->render_state.gen5.surface_table == offset)
855 sna->render_state.gen5.surface_table = offset;
1137 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table &&
1139 sna->kgem.batch[sna->render_state.gen5.surface_table+2] == binding_table[2])) {
1141 offset = sna->render_state.gen5.surface_table;
2340 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) {
2342 offset = sna->render_state.gen5.surface_table;
2690 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) {
2693 offset = sna->render_state.gen5.surface_table;
3142 sna->render_state.gen5.surface_table
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_render.h391 uint16_t surface_table; member in struct:gen4_render_state
411 uint16_t surface_table; member in struct:gen5_render_state
460 uint16_t surface_table; member in struct:gen6_render_state
510 uint16_t surface_table; member in struct:gen7_render_state
562 uint16_t surface_table; member in struct:gen8_render_state
H A Dgen7_render.c907 if (sna->render_state.gen7.surface_table == offset)
915 sna->render_state.gen7.surface_table = offset;
1122 need_stall = sna->render_state.gen7.surface_table != wm_binding_table;
1542 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table &&
1544 sna->kgem.batch[sna->render_state.gen7.surface_table+2] == binding_table[2])) {
1546 offset = sna->render_state.gen7.surface_table;
1549 if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0])
2858 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) {
2860 offset = sna->render_state.gen7.surface_table;
2863 if (sna->kgem.batch[sna->render_state.gen7.surface_table]
[all...]
H A Dgen8_render.c982 if (sna->render_state.gen8.surface_table == offset)
990 sna->render_state.gen8.surface_table = offset;
1193 need_stall = sna->render_state.gen8.surface_table != wm_binding_table;
1615 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table &&
1617 sna->kgem.batch[sna->render_state.gen8.surface_table+2] == binding_table[2])) {
1619 offset = sna->render_state.gen8.surface_table;
1622 if (sna->kgem.batch[sna->render_state.gen8.surface_table] == binding_table[0])
2680 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table) {
2682 offset = sna->render_state.gen8.surface_table;
2685 if (sna->kgem.batch[sna->render_state.gen8.surface_table]
[all...]
H A Dgen4_render.c887 if (sna->render_state.gen4.surface_table == offset)
890 sna->render_state.gen4.surface_table = offset;
1142 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table &&
1144 sna->kgem.batch[sna->render_state.gen4.surface_table+2] == binding_table[2])) {
1146 offset = sna->render_state.gen4.surface_table;
1149 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0])
1387 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0])
2349 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table) {
2351 offset = sna->render_state.gen4.surface_table;
2354 if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table]
[all...]
H A Dgen6_render.c706 if (sna->render_state.gen6.surface_table == offset)
718 sna->render_state.gen6.surface_table = offset;
905 need_stall = sna->render_state.gen6.surface_table != wm_binding_table;
1343 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table &&
1345 sna->kgem.batch[sna->render_state.gen6.surface_table+2] == binding_table[2])) {
1347 offset = sna->render_state.gen6.surface_table;
2657 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) {
2659 offset = sna->render_state.gen6.surface_table;
3067 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) {
3070 offset = sna->render_state.gen6.surface_table;
[all...]
H A Dgen5_render.c815 sna->render_state.gen5.surface_table == offset)
818 sna->render_state.gen5.surface_table = offset;
1100 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table &&
1102 sna->kgem.batch[sna->render_state.gen5.surface_table+2] == binding_table[2])) {
1104 offset = sna->render_state.gen5.surface_table;
2293 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) {
2295 offset = sna->render_state.gen5.surface_table;
2643 *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) {
2646 offset = sna->render_state.gen5.surface_table;
3081 sna->render_state.gen5.surface_table
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dintel.h271 uint16_t surface_table; member in struct:intel_screen_private
H A Di965_render.c1630 OUT_BATCH(intel->surface_table);
2225 intel->surface_table = intel->surface_used;
2888 gen7_upload_binding_table(intel, intel->surface_table);
2892 gen6_upload_binding_table(intel, intel->surface_table);
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dintel.h269 uint16_t surface_table; member in struct:intel_screen_private
H A Di965_render.c1630 OUT_BATCH(intel->surface_table);
2225 intel->surface_table = intel->surface_used;
2888 gen7_upload_binding_table(intel, intel->surface_table);
2892 gen6_upload_binding_table(intel, intel->surface_table);

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