Searched refs:v3d_qpu_magic_waddr_is_tmu (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dqpu_validate.c156 if (v3d_qpu_magic_waddr_is_tmu(state->c->devinfo,
173 if (v3d_qpu_magic_waddr_is_tmu(state->c->devinfo,
H A Dqpu_schedule.c209 } else if (v3d_qpu_magic_waddr_is_tmu(state->devinfo, waddr)) {
672 return (v3d_qpu_magic_waddr_is_tmu(devinfo, waddr) ||
1343 if (v3d_qpu_magic_waddr_is_tmu(devinfo, waddr) &&
H A Dvir_register_allocate.c41 v3d_qpu_magic_waddr_is_tmu(devinfo, inst->dst.index)) ||
H A Dvir.c148 return v3d_qpu_magic_waddr_is_tmu(devinfo, inst->dst.index);
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dqpu_validate.c148 if (v3d_qpu_magic_waddr_is_tmu(inst->alu.add.waddr))
163 if (v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))
H A Dqpu_schedule.c171 } else if (v3d_qpu_magic_waddr_is_tmu(waddr)) {
565 return (v3d_qpu_magic_waddr_is_tmu(waddr) ||
901 if (v3d_qpu_magic_waddr_is_tmu(waddr) && v3d_qpu_waits_on_tmu(after))
H A Dvir_register_allocate.c40 v3d_qpu_magic_waddr_is_tmu(inst->dst.index));
H A Dvir.c132 return v3d_qpu_magic_waddr_is_tmu(inst->dst.index);
/xsrc/external/mit/MesaLib/dist/src/broadcom/qpu/
H A Dqpu_instr.c546 v3d_qpu_magic_waddr_is_tmu(const struct v3d_device_info *devinfo, function in typeref:typename:bool
706 v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.add.waddr)) ||
708 v3d_qpu_magic_waddr_is_tmu(devinfo, inst->alu.mul.waddr))));
H A Dqpu_instr.h447 bool v3d_qpu_magic_waddr_is_tmu(const struct v3d_device_info *devinfo,
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/qpu/
H A Dqpu_instr.c536 v3d_qpu_magic_waddr_is_tmu(enum v3d_qpu_waddr waddr) function in typeref:typename:bool
680 v3d_qpu_magic_waddr_is_tmu(inst->alu.add.waddr)) ||
682 v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))));
H A Dqpu_instr.h444 bool v3d_qpu_magic_waddr_is_tmu(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST;

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