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    Searched defs:X10_12 (Results 1 - 8 of 8) sorted by relevancy

  /src/external/gpl3/gdb/dist/sim/testsuite/bfin/
lmu_cplb_multiple0.S 2471 X10_12: [ I1 ] = R1; // Exception should occur here
2481 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple1.S 2473 X10_12: A0 = 0 || NOP || [ I1 ] = R1; // Exception should occur here
2483 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple0.S 2471 X10_12: [ I1 ] = R1; // Exception should occur here
2481 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple1.S 2473 X10_12: A0 = 0 || NOP || [ I1 ] = R1; // Exception should occur here
2483 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
  /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/
lmu_cplb_multiple0.S 2471 X10_12: [ I1 ] = R1; // Exception should occur here
2481 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple1.S 2473 X10_12: A0 = 0 || NOP || [ I1 ] = R1; // Exception should occur here
2483 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple0.S 2471 X10_12: [ I1 ] = R1; // Exception should occur here
2481 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)
lmu_cplb_multiple1.S 2473 X10_12: A0 = 0 || NOP || [ I1 ] = R1; // Exception should occur here
2483 CHECKREG_SYM(r7, X10_12, r0); // RETX should be value of X10_12 (HARDCODED ADDR!!)

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