/src/sys/arch/arm/xscale/ |
ixp425_qmgr.c | 195 aqm_reg_write(struct ixpqmgr_softc *sc, bus_size_t off, uint32_t val) function in typeref:typename:void 408 aqm_reg_write(sc, qi->qAccRegAddr, entry); 430 aqm_reg_write(sc, qi->qUOStatRegAddr, 488 aqm_reg_write(sc, qi->qUOStatRegAddr, 527 aqm_reg_write(sc, qi->qUOStatRegAddr, 761 aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, intRegVal); 918 aqm_reg_write(sc, reg, v | (1 << (qId % IX_QMGR_MIN_QUEUPP_QID))); 935 aqm_reg_write(sc, reg, v &~ (1 << (qId % IX_QMGR_MIN_QUEUPP_QID))); 1009 aqm_reg_write(sc, IX_QMGR_Q_CONFIG_ADDR_GET(qId), qCfg); 1042 aqm_reg_write(sc, off, v) [all...] |
ixp425_qmgr.c | 195 aqm_reg_write(struct ixpqmgr_softc *sc, bus_size_t off, uint32_t val) function in typeref:typename:void 408 aqm_reg_write(sc, qi->qAccRegAddr, entry); 430 aqm_reg_write(sc, qi->qUOStatRegAddr, 488 aqm_reg_write(sc, qi->qUOStatRegAddr, 527 aqm_reg_write(sc, qi->qUOStatRegAddr, 761 aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, intRegVal); 918 aqm_reg_write(sc, reg, v | (1 << (qId % IX_QMGR_MIN_QUEUPP_QID))); 935 aqm_reg_write(sc, reg, v &~ (1 << (qId % IX_QMGR_MIN_QUEUPP_QID))); 1009 aqm_reg_write(sc, IX_QMGR_Q_CONFIG_ADDR_GET(qId), qCfg); 1042 aqm_reg_write(sc, off, v) [all...] |