| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v9_4.c | 129 SOC15_REG_FIELD(CPC_EDC_SCRATCH_CNT, DED_COUNT) },
132 SOC15_REG_FIELD(CPC_EDC_UCODE_CNT, DED_COUNT) },
162 SOC15_REG_FIELD(CPF_EDC_TAG_CNT, DED_COUNT) },
698 uint32_t sec_count, ded_count; local in function:gfx_v9_4_query_utc_edc_status
723 ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT);
724 if (ded_count) {
726 vml2_mems[i], ded_count);
727 err_data->ue_count += ded_count;
743 ded_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL
862 uint32_t sec_count = 0, ded_count = 0; local in function:gfx_v9_4_query_ras_error_count
[all...] |
| amdgpu_gfx_v9_4.c | 129 SOC15_REG_FIELD(CPC_EDC_SCRATCH_CNT, DED_COUNT) },
132 SOC15_REG_FIELD(CPC_EDC_UCODE_CNT, DED_COUNT) },
162 SOC15_REG_FIELD(CPF_EDC_TAG_CNT, DED_COUNT) },
698 uint32_t sec_count, ded_count; local in function:gfx_v9_4_query_utc_edc_status
723 ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT);
724 if (ded_count) {
726 vml2_mems[i], ded_count);
727 err_data->ue_count += ded_count;
743 ded_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL
862 uint32_t sec_count = 0, ded_count = 0; local in function:gfx_v9_4_query_ras_error_count
[all...] |
| amdgpu_mmhub_v1_0.c | 699 uint32_t value, uint32_t *sec_count, uint32_t *ded_count)
725 *ded_count += ded_cnt;
736 uint32_t sec_count = 0, ded_count = 0; local in function:mmhub_v1_0_query_ras_error_count
748 reg_value, &sec_count, &ded_count);
752 err_data->ue_count += ded_count;
|
| amdgpu_mmhub_v9_4.c | 1548 uint32_t value, uint32_t *sec_count, uint32_t *ded_count)
1574 *ded_count += ded_cnt;
1585 uint32_t sec_count = 0, ded_count = 0; local in function:mmhub_v9_4_query_ras_error_count
1597 reg_value, &sec_count, &ded_count);
1601 err_data->ue_count += ded_count;
|
| amdgpu_mmhub_v1_0.c | 699 uint32_t value, uint32_t *sec_count, uint32_t *ded_count)
725 *ded_count += ded_cnt;
736 uint32_t sec_count = 0, ded_count = 0; local in function:mmhub_v1_0_query_ras_error_count
748 reg_value, &sec_count, &ded_count);
752 err_data->ue_count += ded_count;
|
| amdgpu_mmhub_v9_4.c | 1548 uint32_t value, uint32_t *sec_count, uint32_t *ded_count)
1574 *ded_count += ded_cnt;
1585 uint32_t sec_count = 0, ded_count = 0; local in function:mmhub_v9_4_query_ras_error_count
1597 reg_value, &sec_count, &ded_count);
1601 err_data->ue_count += ded_count;
|
| amdgpu_gfx_v9_0.c | 5643 SOC15_REG_FIELD(CPC_EDC_SCRATCH_CNT, DED_COUNT)
5647 SOC15_REG_FIELD(CPC_EDC_UCODE_CNT, DED_COUNT)
5659 SOC15_REG_FIELD(CPF_EDC_TAG_CNT, DED_COUNT)
5671 SOC15_REG_FIELD(CPG_EDC_TAG_CNT, DED_COUNT)
6202 uint32_t sec_count, ded_count; local in function:gfx_v9_0_query_utc_edc_status
6224 ded_count = REG_GET_FIELD(data, VM_L2_MEM_ECC_CNT, DED_COUNT);
6225 if (ded_count) {
6227 vml2_mems[i], ded_count);
6228 err_data->ue_count += ded_count;
6387 uint32_t sec_count = 0, ded_count = 0; local in function:gfx_v9_0_query_ras_error_count
[all...] |
| amdgpu_gfx_v9_0.c | 5643 SOC15_REG_FIELD(CPC_EDC_SCRATCH_CNT, DED_COUNT)
5647 SOC15_REG_FIELD(CPC_EDC_UCODE_CNT, DED_COUNT)
5659 SOC15_REG_FIELD(CPF_EDC_TAG_CNT, DED_COUNT)
5671 SOC15_REG_FIELD(CPG_EDC_TAG_CNT, DED_COUNT)
6202 uint32_t sec_count, ded_count; local in function:gfx_v9_0_query_utc_edc_status
6224 ded_count = REG_GET_FIELD(data, VM_L2_MEM_ECC_CNT, DED_COUNT);
6225 if (ded_count) {
6227 vml2_mems[i], ded_count);
6228 err_data->ue_count += ded_count;
6387 uint32_t sec_count = 0, ded_count = 0; local in function:gfx_v9_0_query_ras_error_count
[all...] |
