/src/sys/dev/sdmmc/ |
if_bwfm_sdio.c | 1256 uint32_t clkctl, devctl, req; local in function:bwfm_sdio_htclk 1277 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1278 devctl |= BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1279 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1283 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1284 devctl &= ~BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1285 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1304 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1305 devctl &= ~BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1306 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1493 uint32_t clkctl, devctl, intstat, hostint; local in function:bwfm_sdio_task1 [all...] |
if_bwfm_sdio.c | 1256 uint32_t clkctl, devctl, req; local in function:bwfm_sdio_htclk 1277 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1278 devctl |= BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1279 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1283 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1284 devctl &= ~BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1285 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1304 devctl = bwfm_sdio_read_1(sc, BWFM_SDIO_DEVICE_CTL); 1305 devctl &= ~BWFM_SDIO_DEVICE_CTL_CA_INT_ONLY; 1306 bwfm_sdio_write_1(sc, BWFM_SDIO_DEVICE_CTL, devctl); 1493 uint32_t clkctl, devctl, intstat, hostint; local in function:bwfm_sdio_task1 [all...] |
/src/sys/arch/arm/broadcom/ |
bcm53xx_eth.c | 566 uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); local in function:bcmeth_ifinit 567 devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 568 devctl &= ~FLOW_CTRL_MODE; 569 devctl &= ~MIB_RD_RESET_EN; 570 devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 571 devctl &= ~CPU_FLOW_CTRL_ON; 572 bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 595 "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 596 devctl, sc->sc_cmdcfg,
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bcm53xx_eth.c | 566 uint32_t devctl = bcmeth_read_4(sc, GMAC_DEVCONTROL); local in function:bcmeth_ifinit 567 devctl |= RGMII_LINK_STATUS_SEL | NWAY_AUTO_POLL_EN | TXARB_STRICT_MODE; 568 devctl &= ~FLOW_CTRL_MODE; 569 devctl &= ~MIB_RD_RESET_EN; 570 devctl &= ~RXQ_OVERFLOW_CTRL_SEL; 571 devctl &= ~CPU_FLOW_CTRL_ON; 572 bcmeth_write_4(sc, GMAC_DEVCONTROL, devctl); 595 "devctl=%#x ucmdcfg=%#x xmtctl=%#x rcvctl=%#x\n", 596 devctl, sc->sc_cmdcfg,
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/src/sys/dev/pci/ |
if_bge.c | 4202 pcireg_t devctl, reg; local in function:bge_reset 4334 devctl = pci_conf_read(sc->sc_pc, sc->sc_pcitag, 4337 devctl &= ~(PCIE_DCSR_ENA_RELAX_ORD | 4342 devctl &= ~(0x00e0); 4344 devctl |= PCIE_DCSR_URD | PCIE_DCSR_FED 4347 sc->bge_pciecap + PCIE_DCSR, devctl);
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if_bge.c | 4202 pcireg_t devctl, reg; local in function:bge_reset 4334 devctl = pci_conf_read(sc->sc_pc, sc->sc_pcitag, 4337 devctl &= ~(PCIE_DCSR_ENA_RELAX_ORD | 4342 devctl &= ~(0x00e0); 4344 devctl |= PCIE_DCSR_URD | PCIE_DCSR_FED 4347 sc->bge_pciecap + PCIE_DCSR, devctl);
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