| /src/sys/arch/powerpc/pic/ |
| pic_prepivr.c | 94 /* initialize the ELCR */
105 u_int8_t elcr[2]; local in function:prepivr_establish_irq
110 elcr[0] = isa_inb(IO_ELCR1);
111 elcr[1] = isa_inb(IO_ELCR2);
114 elcr[icu] |= 1 << bit;
116 elcr[icu] &= ~(1 << bit);
118 isa_outb(IO_ELCR1, elcr[0]);
119 isa_outb(IO_ELCR2, elcr[1]);
|
| pic_prepivr.c | 94 /* initialize the ELCR */
105 u_int8_t elcr[2]; local in function:prepivr_establish_irq
110 elcr[0] = isa_inb(IO_ELCR1);
111 elcr[1] = isa_inb(IO_ELCR2);
114 elcr[icu] |= 1 << bit;
116 elcr[icu] &= ~(1 << bit);
118 isa_outb(IO_ELCR1, elcr[0]);
119 isa_outb(IO_ELCR2, elcr[1]);
|
| /src/sys/arch/i386/pci/ |
| piix.c | 282 uint8_t elcr; local in function:piix_get_trigger
290 elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
291 if (elcr & (1 << bit))
304 uint8_t elcr; local in function:piix_set_trigger
312 elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
314 elcr |= (1 << bit);
316 elcr &= ~(1 << bit);
317 bus_space_write_1(ph->ph_iot, ph->ph_elcr_ioh, off, elcr);
328 uint8_t elcr[2]; local in function:piix_pir_dump
330 elcr[0] = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, 0)
[all...] |
| piix.c | 282 uint8_t elcr; local in function:piix_get_trigger
290 elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
291 if (elcr & (1 << bit))
304 uint8_t elcr; local in function:piix_set_trigger
312 elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
314 elcr |= (1 << bit);
316 elcr &= ~(1 << bit);
317 bus_space_write_1(ph->ph_iot, ph->ph_elcr_ioh, off, elcr);
328 uint8_t elcr[2]; local in function:piix_pir_dump
330 elcr[0] = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, 0)
[all...] |
| /src/sys/arch/alpha/jensenio/ |
| jensenio_intr.c | 358 int elcr; local in function:jensenio_setlevel
361 elcr = irq >> 3;
364 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
369 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
388 * Map the ELCR registers and initialize all interrupts to EDGE
392 panic("jensenio_init_intr: unable to map ELCR registers");
|
| jensenio_intr.c | 358 int elcr; local in function:jensenio_setlevel
361 elcr = irq >> 3;
364 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
369 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
388 * Map the ELCR registers and initialize all interrupts to EDGE
392 panic("jensenio_init_intr: unable to map ELCR registers");
|
| /src/sys/arch/alpha/pci/ |
| pci_2100_a500.c | 741 * Map the ELCR registers.
744 panic("dec_2100_a500_pic_init_intr: unable to map ELCR "
759 int elcr; local in function:dec_2100_a500_pic_setlevel
768 elcr = 0;
775 elcr = 0;
780 elcr = 1;
786 elcr = 1;
794 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
799 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
|
| pci_2100_a500.c | 741 * Map the ELCR registers.
744 panic("dec_2100_a500_pic_init_intr: unable to map ELCR "
759 int elcr; local in function:dec_2100_a500_pic_setlevel
768 elcr = 0;
775 elcr = 0;
780 elcr = 1;
786 elcr = 1;
794 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
799 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
|
| sio_pic.c | 137 /******************** i82378 SIO ELCR functions ********************/
166 i82378_read_elcr(int elcr)
169 return (bus_space_read_1(sio_iot, sio_ioh_elcr, elcr));
173 i82378_write_elcr(int elcr, uint8_t val)
176 bus_space_write_1(sio_iot, sio_ioh_elcr, elcr, val);
179 /******************** Cypress CY82C693 ELCR functions ********************/
248 cy82c693_read_elcr(int elcr)
251 return (cy82c693_read(sio_cy82c693_handle, CONFIG_ELCR1 + elcr));
255 cy82c693_write_elcr(int elcr, uint8_t val)
258 cy82c693_write(sio_cy82c693_handle, CONFIG_ELCR1 + elcr, val)
292 uint8_t ocw1[2], elcr[2]; local in function:sio_setirqstat
[all...] |
| sio_pic.c | 137 /******************** i82378 SIO ELCR functions ********************/
166 i82378_read_elcr(int elcr)
169 return (bus_space_read_1(sio_iot, sio_ioh_elcr, elcr));
173 i82378_write_elcr(int elcr, uint8_t val)
176 bus_space_write_1(sio_iot, sio_ioh_elcr, elcr, val);
179 /******************** Cypress CY82C693 ELCR functions ********************/
248 cy82c693_read_elcr(int elcr)
251 return (cy82c693_read(sio_cy82c693_handle, CONFIG_ELCR1 + elcr));
255 cy82c693_write_elcr(int elcr, uint8_t val)
258 cy82c693_write(sio_cy82c693_handle, CONFIG_ELCR1 + elcr, val)
292 uint8_t ocw1[2], elcr[2]; local in function:sio_setirqstat
[all...] |
| /src/sys/arch/evbmips/loongson/ |
| generic2e_machdep.c | 506 uint elcr; local in function:via686sb_setup
590 /* setup ELCR: PCI interrupts are level-triggered. */
591 elcr = (1 << VIA686_IRQ_PCIA) | (1 << VIA686_IRQ_PCIB) |
593 REGVAL8(BONITO_PCIIO_BASE + 0x4d0) = (elcr >> 0) & 0xff;
594 REGVAL8(BONITO_PCIIO_BASE + 0x4d1) = (elcr >> 8) & 0xff;
|
| generic2e_machdep.c | 506 uint elcr; local in function:via686sb_setup
590 /* setup ELCR: PCI interrupts are level-triggered. */
591 elcr = (1 << VIA686_IRQ_PCIA) | (1 << VIA686_IRQ_PCIB) |
593 REGVAL8(BONITO_PCIIO_BASE + 0x4d0) = (elcr >> 0) & 0xff;
594 REGVAL8(BONITO_PCIIO_BASE + 0x4d1) = (elcr >> 8) & 0xff;
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/hvm/ |
| save.h | 351 uint8_t elcr; member in struct:hvm_hw_vpic
|
| save.h | 351 uint8_t elcr; member in struct:hvm_hw_vpic
|
