HomeSort by: relevance | last modified time | path
    Searched defs:en (Results 1 - 25 of 44) sorted by relevancy

1 2

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
gpio.h 44 uint32_t en; member in struct:gpio
59 uint32_t en);
63 uint32_t en);
67 uint32_t en);
71 uint32_t en);
75 uint32_t en);
79 uint32_t en);
83 uint32_t en);
90 uint32_t *en);
93 uint32_t en,
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/ce/
nouveau_nvkm_engine_ce_gk104.c 57 const struct nvkm_enum *en = local in function:gk104_ce_intr_launcherr
59 nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : "");
nouveau_nvkm_engine_ce_gp100.c 59 const struct nvkm_enum *en = local in function:gp100_ce_intr_launcherr
61 nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : "");
nouveau_nvkm_engine_ce_gt215.c 58 const struct nvkm_enum *en = local in function:gt215_ce_intr
63 en ? en->name : "", chan ? chan->chid : -1,
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sec/
nouveau_nvkm_engine_sec_g98.c 57 const struct nvkm_enum *en = local in function:g98_sec_intr
62 en ? en->name : "UNKNOWN", chan ? chan->chid : -1,
  /src/sys/arch/arm/marvell/
mvsoctmr.c 246 const int en = 1, autoen = 1; local in function:cpu_initclocks
259 mvsoctmr_cntl(sc, MVSOCTMR_TIMER0, timer0_tval, en, autoen);
260 mvsoctmr_cntl(sc, MVSOCTMR_TIMER1, 0xffffffff, en, autoen);
338 mvsoctmr_cntl(struct mvsoctmr_softc *sc, int num, u_int ticks, int en,
348 if (en)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
hw_gpio.h 44 uint32_t en; member in struct:hw_gpio_pin
102 uint32_t en; member in struct:hw_gpio::__anona7ac9e0b0108
117 uint32_t en,
amdgpu_gpio_service.c 139 uint32_t en; local in function:dal_gpio_service_create_irq
141 if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {
146 return dal_gpio_create_irq(service, id, en);
155 uint32_t en; local in function:dal_gpio_service_create_generic_mux
158 if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {
164 service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
186 uint32_t en)
191 service->translate.funcs->id_to_offset(id, en, &pin);
247 uint32_t en)
249 return service->busyness[id][en];
301 uint32_t en = gpio->en; local in function:dal_gpio_service_open
480 uint32_t en; local in function:dal_gpio_create_ddc
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_powertune.c 860 uint32_t en = enable ? 1 : 0; local in function:smu7_enable_didt
870 block_en = PP_CAP(PHM_PlatformCaps_SQRamping) ? en : 0;
876 block_en = PP_CAP(PHM_PlatformCaps_DBRamping) ? en : 0;
882 block_en = PP_CAP(PHM_PlatformCaps_TDRamping) ? en : 0;
888 block_en = PP_CAP(PHM_PlatformCaps_TCPRamping) ? en : 0;
amdgpu_vega10_powertune.c 858 uint32_t en = (enable ? 1 : 0); local in function:vega10_didt_set_mask
863 DIDT_SQ_CTRL0, DIDT_CTRL_EN, en);
865 didt_block_info |= en << SQ_Enable_SHIFT;
870 DIDT_DB_CTRL0, DIDT_CTRL_EN, en);
872 didt_block_info |= en << DB_Enable_SHIFT;
877 DIDT_TD_CTRL0, DIDT_CTRL_EN, en);
879 didt_block_info |= en << TD_Enable_SHIFT;
884 DIDT_TCP_CTRL0, DIDT_CTRL_EN, en);
886 didt_block_info |= en << TCP_Enable_SHIFT;
891 DIDT_DBR_CTRL0, DIDT_CTRL_EN, en);
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/
nouveau_nvkm_subdev_fb_nv50.c 147 const struct nvkm_enum *en, *re, *cl, *sc; local in function:nv50_fb_intr
179 en = nvkm_enum_find(vm_engine, st0);
183 else if (en && en->data) sc = nvkm_enum_find(en->data, st3);
194 st0, en ? en->name : "",
  /src/sys/arch/hpcmips/vr/
vrc4172pwm.c 457 int en, freq, duty; local in function:vrc4172pwm_dumpreg
459 en = vrc4172pwm_read(sc, VRC2_PWM_LCDDUTYEN);
464 " freq = 0x%x, duty = 0x%x\n", en, freq, duty);
  /src/sys/external/bsd/libfdt/dist/
fdt_sw.c 232 fdt32_t *en; local in function:fdt_end_node
236 en = fdt_grab_space_(fdt, FDT_TAGSIZE);
237 if (! en)
240 *en = cpu_to_fdt32(FDT_END_NODE);
  /src/usr.bin/xlint/lint1/
debug.c 179 for (const sym_t *en = tp->u.enumer->en_first_enumerator; local in function:debug_type_details
180 en != NULL; en = en->s_next) {
181 debug_sym("", en, "\n");
  /src/sys/arch/evbarm/stand/boot2440/
main.c 230 uint8_t en[6] = {DM9000MAC}; local in function:main
234 memcpy(bi_net.mac_address, en, sizeof(bi_net.mac_address));
dm9000.c 117 uint8_t en[6]; member in struct:local
165 uint8_t *en = aux; local in function:dm9k_match
178 if (en != NULL
179 && en[0] && en[1] && en[2] && en[3] && en[4] && en[5])
180 memcpy(l->en, en, 6)
192 uint8_t *en = l->en; local in function:dm9k_init
    [all...]
  /src/sys/arch/sandpoint/stand/altboot/
fxp.c 192 uint8_t *en = data; local in function:fxp_init
206 v = read_eeprom(sc, 0); en[0] = v; en[1] = v >> 8;
207 v = read_eeprom(sc, 1); en[2] = v; en[3] = v >> 8;
208 v = read_eeprom(sc, 2); en[4] = v; en[5] = v >> 8;
211 en[0], en[1], en[2], en[3], en[4], en[5])
    [all...]
kse.c 131 uint8_t *en; local in function:kse_init
137 en = data;
139 en[0] = i;
140 en[1] = i >> 8;
142 en[2] = i;
143 en[3] = i >> 8;
145 en[4] = i;
146 en[5] = i >> 8;
149 en[0], en[1], en[2], en[3], en[4], en[5])
    [all...]
pcn.c 149 uint8_t *en; local in function:pcn_init
166 en = data;
167 val = pcn_csr_read(l, PCN_CSR12); en[0] = val; en[1] = (val >> 8);
168 val = pcn_csr_read(l, PCN_CSR13); en[2] = val; en[3] = (val >> 8);
169 val = pcn_csr_read(l, PCN_CSR14); en[4] = val; en[5] = (val >> 8);
172 en[0], en[1], en[2], en[3], en[4], en[5])
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_nv.c 249 struct soc15_allowed_register_entry *en; local in function:nv_read_register
253 en = &nv_allowed_read_registers[i];
255 (adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/
nouveau_nvkm_engine_fifo_gf100.c 386 const struct nvkm_enum *en; local in function:gf100_fifo_intr_sched
388 en = nvkm_enum_find(gf100_fifo_sched_reason, code);
390 nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : "");
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/
nouveau_nvkm_engine_gr_nv50.c 639 const struct nvkm_enum *en; local in function:nv50_gr_intr
653 en = nvkm_enum_find(nv50_data_error_names, ecode);
655 ecode, en ? en->name : "");
  /src/usr.bin/rpcgen/
rpc_parse.h 152 enum_def en; member in union:definition::__anon73fe6ec0010a
  /src/sys/dev/ic/
hd44780_subr.c 272 int curdaddr, en, chipdaddr; local in function:hlcd_updatechar
276 en = DADDR_TO_CHIPNO(daddr);
279 hd44780_ir_write(sc, en, cmd_ddramset(chipdaddr));
281 hd44780_dr_write(sc, en, c);
420 hd44780_chipinit(struct hd44780_chip *sc, uint32_t en)
428 hd44780_ir_write(sc, en, cmd);
430 hd44780_ir_write(sc, en, cmd);
431 hd44780_ir_write(sc, en, cmd);
439 hd44780_ir_write(sc, en, cmd);
443 hd44780_ir_write(sc, en, cmd)
480 uint32_t en = sc->sc_curchip; local in function:hd44780_ioctl_subr
    [all...]
  /src/sys/nfs/
nfs_bio.c 89 int got_buf = 0, error = 0, n = 0, on = 0, en, enn; local in function:nfs_bioread
273 en = ndp->dc_entry;
279 while (enn < en && dp < edp) {
293 (en > 0 && NFS_GETCOOKIE(pdp) != ndp->dc_cookie)) {
316 if (en == 0 && pdp == dp) {

Completed in 27 milliseconds

1 2